I made a project of a small pcb and then I want to create a board with multiple pcb's to produce my product.
When I used Eagle 6.3 I made following procedure without problems:
- Create a schematic in schematil layout editor.
- Design pcb with pcb layout editor linked with scheme.
- Made a copy of .brd file of my pcb.
- Opened copy file with pcb layout editor.
- Made a copy and paste of my pcb as many times I wanted in order co complete my board. All copies of my pcb were exact copies of original, in all layers.
When I use same procedure with Eagle 6.4, the layer tnames (25) has his content incremented (i.e. if I have in my original pcb 10 resistors named from R1 to R10, when I make a copy of my pcb, it presents same resistors with names R11 to R20. As I use layer 25 as data to my silkscreen, this is completely unacceptable. How can I make Eagle 6.4 work in this case as Eagle 6.3?