Questions on Eagle before sending a board off for production.

I'm not an expert, but here's my take on it.

1) The easy way would be to ask the board house to "clip" the silkscreen. Then they will automatically delete any portion of the silkscreen that interferes with exposed copper or open soldermask areas. In this case you can just "accept" the DRC errors.

2) The better, but more time consuming way would be to delete the offending silkscreen areas manually, yourself. From the image that you included, it looks like you might need to open the library and edit the component. The "tPlace" layer can have silkscreen that DOES NOT cover up copper. This is what will print on the board. And the "tDocu" layer can have the complete silkscreen image. This is what you can print out on paper for the assembly drawing.

Good luck.

On 21/10/14 01:49, RayA wrote:

2) The better, but more time consuming way would be to delete the

offending silkscreen areas manually, yourself. From the image that you

included, it looks like you might need to open the library and edit the

component. The "tPlace" layer can have silkscreen that DOES NOT cover up

copper. This is what will print on the board. And the "tDocu" layer can

have the complete silkscreen image. This is what you can print out on

paper for the assembly drawing.

 

While that's a good principle, and I would certainly encourage everyone

to design their libraries such that nothing on tPlace overlaps any pads,

once you get to the final board layout there are likely to be at least a

few vias that sit under the component outline sections on the xPlace

layers. This can't be fixed in the library in any meaningful manner.

Most board houses will clip the silkscreen.

On one occasion, though, I had a batch of boards where they had

erroneously clipped the top silkscreen using the bottom mask, resulting

in a couple of fragments printed onto copper. The boards all worked fine

anyway, although that's more by luck than judgement.

Cheers,

Rob

In my experience, most board houses are good about removing silkscreen that

impinges on pads.

Most of them. Their manufacturing software will automatically look at

places where silkscreen is over top of a pad, and sometimes over top of a

place where there won't be soldermask (tStop/bStop).

Some rough patches I've seen:

- In EAGLE, there is the rectangle tool, which can be used in some

libraries to show the location of pads or just simple rectangles.

Silkscreen rectangles created with this tool can be treated differently by

some older CAM packages, and they will be incapable of removing that

silkscreen automatically. I've had that happen already where there was

silkscreen covering a solderable pad. The board shop did remake the boards

correctly at their expense, but it was still an inconvenience for me.

Simple silkscreen lines and polygons are typically removed more

consistently.

- Other board shops with old CAM software implement an inefficient

workaround: Their workers manually remove all unwanted silkscreen. Manual

processes like this can leave the door open to errors.

Board shops with newer or better CAM software are capable of very

effectively and consistently removing silkscreen from solderable areas,

including rectangles.

Some board fab shops will always send you a checkplot or Gerbers to be

approved before starting any production. You can ask for that on your order

though:

"Please send PDF checkplots  for approval before starting production of this order."

The PDF checkplots I've received from my employer's primary board vendor

are typically PDF format, with one board layer shown per page.

--

Web access to CadSoft support forums at www.eaglecentral.ca.  Where the CadSoft EAGLE community meets.

Dear J Chop,

Everything should be fine. Unless it a mistake from your design and layout.

For PCB making, they normally will not use this layer.

If you don't want to see this error just deactivated them before run the DRC check.

This will make your life easy with just few major error to check normally.

Have Fun and Enjoys.

Cheers,

ES

Thanks all, I appreciate the information :-)