How can I change the width of thermal ties

Dave P schrieb:

By "thermal ties" I mean the copper that connects a pad to a copper pour.

I have a situation with a 0805 chip resistor:

• the left pad is connected to an 8-mil trace coming into the pad and to an

8-mil trace exiting the pad.

• the right pad connects to the GND polygon, with 3 16~18-mil traces. 

So this means that there is a LOT more copper on the right end of the

resistor.  I have read that in this type of situation when the board is

reflow soldered that the part can get pulled over to one pad and make poor

connection to the other pad, or that the part can "tombstone".

To my knowledge, with 0805 parts the tombstone risk is not too high.

This is more critical with smaller part sizes (0603, 0402...).

If what

I've read is correct, how do I make the copper (thermal) ties on the right

pad, narrower?  I played with DRC/Supply values, with no success.

The width of the thermal ties is automatically calculated based on the

pad diameter/size, and then limited to twice the polygon width (this is

also described in the manual and help somewhere...).

If you want narrower ties, simply reduce the polygon width. Don't to

this excessively, since you'd get /huge/ plot files then - and angry

callbacks from your board house.

For our standard boards using 0.3 mm tracks, I use 0.15 mm polygons

which result in ties of exactly the common track width. Of course, in

your situation there are three ties against one track, but that has

never led to any problems here (we also use 0805 as standard size).

BTW, I'd gladly post a pic of a portion of my board, but I don't know how

to save a portion of the board as a graphic.  I use EAGLE v5.6.0 and Win

XP/sp3.

Export an image, then cutout the section. I can highly recommend

FastStone for this (very comfortable and efficient).

You could also take a partial screenshot. Again, FastStone is your very

comfortable friend.

<http://www.faststone.org/FSViewerDetail.htm>

Tilmann

Dave P schrieb:

By "thermal ties" I mean the copper that connects a pad to a copper pour.

I have a situation with a 0805 chip resistor:

• the left pad is connected to an 8-mil trace coming into the pad and to an

8-mil trace exiting the pad.

• the right pad connects to the GND polygon, with 3 16~18-mil traces. 

So this means that there is a LOT more copper on the right end of the

resistor.  I have read that in this type of situation when the board is

reflow soldered that the part can get pulled over to one pad and make poor

connection to the other pad, or that the part can "tombstone".

To my knowledge, with 0805 parts the tombstone risk is not too high.

This is more critical with smaller part sizes (0603, 0402...).

If what

I've read is correct, how do I make the copper (thermal) ties on the right

pad, narrower?  I played with DRC/Supply values, with no success.

The width of the thermal ties is automatically calculated based on the

pad diameter/size, and then limited to twice the polygon width (this is

also described in the manual and help somewhere...).

If you want narrower ties, simply reduce the polygon width. Don't to

this excessively, since you'd get /huge/ plot files then - and angry

callbacks from your board house.

For our standard boards using 0.3 mm tracks, I use 0.15 mm polygons

which result in ties of exactly the common track width. Of course, in

your situation there are three ties against one track, but that has

never led to any problems here (we also use 0805 as standard size).

BTW, I'd gladly post a pic of a portion of my board, but I don't know how

to save a portion of the board as a graphic.  I use EAGLE v5.6.0 and Win

XP/sp3.

Export an image, then cutout the section. I can highly recommend

FastStone for this (very comfortable and efficient).

You could also take a partial screenshot. Again, FastStone is your very

comfortable friend.

<http://www.faststone.org/FSViewerDetail.htm>

Tilmann