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Overlap error under IC

autodeskguest over 15 years ago

I have manually placed GND vias under the IC, but the DRC can't accept it,

showing Overlap error, like seen in the snapshot. Why?

Regards,

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Richard_H over 15 years ago

Morten Leikvoll schrieb:
"Thiago Henrique Rodrigues" <thiago_hr@yahoo.com.br> wrote in message
news:hjn6vb$cqv$1@cheetah.cadsoft.de...
I still don't understand that error... there is this ESD diode, with 3
terminals (two of them connected to GND in schematic). I want to put vias
on these pads directly to GND, but it keeps generating overlap error. But
if I create a via name GND on the side of the diode, it connects the pad
to the via... what is wrong?

If you put vias ON smd pads, then you will always get drc error.

You won't get an error, if you change the Design Rules.
Go to the Clearance tab and set the value for Same signals
for SMD - Via to 0.

--
Mit freundlichen Gruessen / Best regards
Richard Hammerl
CadSoft Support -- hotline@cadsoft.de
FAQ: http://www.cadsoft.de/faq.htm
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Richard_H over 15 years ago

Morten Leikvoll schrieb:
"Thiago Henrique Rodrigues" <thiago_hr@yahoo.com.br> wrote in message
news:hjn6vb$cqv$1@cheetah.cadsoft.de...
I still don't understand that error... there is this ESD diode, with 3
terminals (two of them connected to GND in schematic). I want to put vias
on these pads directly to GND, but it keeps generating overlap error. But
if I create a via name GND on the side of the diode, it connects the pad
to the via... what is wrong?

If you put vias ON smd pads, then you will always get drc error.

You won't get an error, if you change the Design Rules.
Go to the Clearance tab and set the value for Same signals
for SMD - Via to 0.

--
Mit freundlichen Gruessen / Best regards
Richard Hammerl
CadSoft Support -- hotline@cadsoft.de
FAQ: http://www.cadsoft.de/faq.htm
Cancel
Vote Up 0 Vote Down

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