Hello Experts,
I have a package in my library that has a polygon that sits on top of a pad labeled P$3 (second attached picture with red pads). This pad is not connected to any pin in the device, because its purpose is to hold the part physically attached to the board.
When I run the autorouter, it places the wires on top of the polygon that surrounds the pad and shorts them.
On the other hand, the DRC recognises that this is wrong and marks it accordingly (first attached picture with blue copper).
Q1. What would be the best way to avoid wires shortened by the autorouter? Should all the pads in the package be connected to some pins and eventually to nets to avoid it? But the library device editor specifically allows it and does not give any warnings if its not so.
Q2. Any other similar scenarios that we should avoid?
Regards,
On this picture you can see a blue vertical wire that runs from the bottom to the top to a via, across the part's polygon. The wire was created by the autorouter.
Eagle version: 7.6.0
