How to design a board with ICs with their own ground and power plane

Designing boards is not trivial and your chances of getting this right first time are not good so my first advice is that you shouldn't plan to get it right the first time - expect iterations.

I'm assuming this board will have no more than 4 layers.

If it's for home use and won't need to comply with any EMC regulations then just use a common ground plane  - if one power rail is dominant (connected to the largest number of nodes) then it may be good to use a power plane - sometimes I try to group parts according to the power they need so that I can reasonably have more than one power plane on the same layer. For good EMC performance the power plane should be decoupled to the ground plane in many places with small ceramic caps.

If power planes don't look feasible then make the two inner layers both ground planes but run the power as tracks in one inner layer (filling in all the spaces with ground with lots and lots of little vias to link to the other ground plane).

At the power switching chips then copy the demo board layout as closely as you can - identify the high current loops in the circuit and make sure that the high currents do not flow thought the main ground plane but are all on the component layer of the board.  Anchor the ground area on the top layer to the ground plane with many vias close together but aiming for as close to a single point connection as you can. Keep the area of the high current loops as small as you can.

You should NOT use a power plane for the power input to the switching chips - use track (until you get tot the chip and its power input capacitor) - the inductance of the track will maintain some separation of input noise between the chips which will help them work better and their input high current loop should be through he local capacitor between Vin on the top layer and Ground on the top layer.

Fill any blank areas of board near the power chips on all layers with ground - the more copper in the board the better it gets the heat away. Don't let the PCB cad system out thermal reliefs in the ground vias.

If you need to comply with any EMC regs - do all the above, build a prototype, measure it with a spectrum analyzer and a a simple setup like  a TEM cell  - it will usually fail the tests (unless you are very good at this work) - use a near field probe and other tricks to work out where the unwanted emissions come from and fix the problem. There are no shortcuts round this and no way round needing to actually measure emissions.

People will suggest that you could buy a ready made board very cheaply on eBay - I did so recently because a customers design has big issues with an LTC3780 based design and I wanted to compare. The customer design is so noisy that the GB Ethernet on the same board doesn't work properly - the eBay board is even worse (volts of HF noise on the output !!)  - and it doesn't regulate properly either !!

I've designed a little board to see if I can get the LTC3780 to work right - I'll have the boards built by the end of next week and I'll post some details then.

MK

Thanks Micheal for the quick reply and for all advices using 4 layers board.

My purpose now is to have the whole board working for my home and maybe for commercial uses in the future.

For this reason I should start with 2 layers board (having one Gnd plane on both side of the board) taking care mainly of the trace width (depending on the current) and of components placement.

This because there  is no recommendation about using 4 or more layers in every IC suggested layout (on their datasheet). They only  suggest to put vias to the ground plane  without specifiing if buried, through-hole or blind (even if I think the step-up IC  need 4 layers minimum and buried vias for thermal issues).

Do you think I could use a 2 Layer board?

If yes or not (in this case i will use all you suggested for 4 layers board)  my doubt is this:

starting from the LDO  there are polygons for Vin, GND and Vout signals. Same thing for the battery charger (Vbat, Vss, Vdd) and ending with the step up (Gnd polygon).

Since I have to put them all together , do I have to draw exactly these polygon for each side of the board  or just drawing trace with the right width and length will be enough between the 3  ICs?For example the Vout of the LDO will be the Vdd of the battery charger (the input of the  second ic in the figure) so I dont know if I have to draw 2 separated  polygon (one for the VOUT  LDO and one for the VDD of the  charger), just one or simply just connecting them with one trace of the right trace and length?

I dont know if the explanation of my doubt is clear! Hope so!

Thanks again

You will probably get away with a 2 layer board, it will be better (thermally) if you get it made with 2oz copper (rather than 1oz).

Use separate polygons on the top (component side) and as much continuous ground plane as possible on the bottom side.

Join the VOUT LDO polygon with  a track to the VDD of the charger.

When you've done the layout then post it here.

MK

Thanks Micheal,

This is clear now!

As soon as I finish  I' will post it.

Thanks for support and patience!

Nico

Thanks for the great explanation michael. Found this really helpful.