explicit net names in schematics issue

On 10/11/2016 3:54 AM, Morten Leikvoll wrote:

For components having pin direction "pwr" there is an explicit

netname/signal generated taking the pin name. (this post does not cover

the long discussed controversy of that feature).

 

I found issues when trying to write a script to find where a selected

airwire in the board is drawn on the schematic (yes I have large

designs). The board do make airwires of these explicit names, but their

visibility seems to be limited in schematics.

 

First, I discovered that the UL_SCHEMATIC "nets" loop member did not

cover these nets. But, for some reason, the allnets loop member does. I

am not sure why, but it did give me a reminder to use allnets instead of

nets in my script.

 

Then I discovered that the schematic show command does not find these

explicit names unless there is a wire drawn to one of the pins. But the

board show does.

 

Try adding any component with a VCC pwr pin, for example a 74xx chip,

and do "show vcc" from both board and schematic. Only board perspective

will show it.

 

I'd suggest this was a bug.

Hi Morten,

This isn't a bug, but I would be hard pressed to call it "intuitive". I

personally have never been a fan of pwr pin name defining a net feature.

I've always felt it's ambiguous and error-prone but I'm sure there are

users who like it that way for their own reasons.

If I were to venture a guess, the nets loop member probably only grabs

explicitly drawn net segments. Since the pwr pins are implicit(no nets

by default) it probably doesn't include them. Allnets would be the way

to go on this one.

The solution to this would be a change of behaviour and that would be a

hard sell to the devs and the EAGLE users who are used to it working

that way.

hth,

Jorge Garcia

On 11.10.2016 18:43, Jorge Garcia wrote:

On 10/11/2016 3:54 AM, Morten Leikvoll wrote:

For components having pin direction "pwr" there is an explicit

netname/signal generated taking the pin name. (this post does not cover

the long discussed controversy of that feature).

 

I found issues when trying to write a script to find where a selected

airwire in the board is drawn on the schematic (yes I have large

designs). The board do make airwires of these explicit names, but their

visibility seems to be limited in schematics.

 

First, I discovered that the UL_SCHEMATIC "nets" loop member did not

cover these nets. But, for some reason, the allnets loop member does. I

am not sure why, but it did give me a reminder to use allnets instead of

nets in my script.

 

Then I discovered that the schematic show command does not find these

explicit names unless there is a wire drawn to one of the pins. But the

board show does.

 

Try adding any component with a VCC pwr pin, for example a 74xx chip,

and do "show vcc" from both board and schematic. Only board perspective

will show it.

 

I'd suggest this was a bug.

 

Hi Morten,

 

This isn't a bug, but I would be hard pressed to call it "intuitive". I

personally have never been a fan of pwr pin name defining a net feature.

I've always felt it's ambiguous and error-prone but I'm sure there are

users who like it that way for their own reasons.

 

If I were to venture a guess, the nets loop member probably only grabs

explicitly drawn net segments. Since the pwr pins are implicit(no nets

by default) it probably doesn't include them. Allnets would be the way

to go on this one.

 

The solution to this would be a change of behaviour and that would be a

hard sell to the devs and the EAGLE users who are used to it working

that way.

 

hth,

Jorge Garcia

Your first paragraph sounds like an invitation to pick up that old

thread again. Although I have suggested in those old posts how eagle

could change and still keep backward compatibility and/or improve DRC,

this is subject for a different thread.

The change of behaviour I do not agree on. The only thing I basically

ask is for is that "show " shows the open pins with

explicit nets at shcematic.

For multi sheet hits where eagle is popping up a list dialog, The pins

not belonging to a segment should show in the list too.

Not showing it is wrong, cause the net is there even if you dont see a

segment/wire.

On 11.10.2016 18:43, Jorge Garcia wrote:

On 10/11/2016 3:54 AM, Morten Leikvoll wrote:

For components having pin direction "pwr" there is an explicit

netname/signal generated taking the pin name. (this post does not cover

the long discussed controversy of that feature).

 

I found issues when trying to write a script to find where a selected

airwire in the board is drawn on the schematic (yes I have large

designs). The board do make airwires of these explicit names, but their

visibility seems to be limited in schematics.

 

First, I discovered that the UL_SCHEMATIC "nets" loop member did not

cover these nets. But, for some reason, the allnets loop member does. I

am not sure why, but it did give me a reminder to use allnets instead of

nets in my script.

 

Then I discovered that the schematic show command does not find these

explicit names unless there is a wire drawn to one of the pins. But the

board show does.

 

Try adding any component with a VCC pwr pin, for example a 74xx chip,

and do "show vcc" from both board and schematic. Only board perspective

will show it.

 

I'd suggest this was a bug.

 

Hi Morten,

 

This isn't a bug, but I would be hard pressed to call it "intuitive". I

personally have never been a fan of pwr pin name defining a net feature.

I've always felt it's ambiguous and error-prone but I'm sure there are

users who like it that way for their own reasons.

 

If I were to venture a guess, the nets loop member probably only grabs

explicitly drawn net segments. Since the pwr pins are implicit(no nets

by default) it probably doesn't include them. Allnets would be the way

to go on this one.

 

The solution to this would be a change of behaviour and that would be a

hard sell to the devs and the EAGLE users who are used to it working

that way.

 

hth,

Jorge Garcia

Your first paragraph sounds like an invitation to pick up that old

thread again. Although I have suggested in those old posts how eagle

could change and still keep backward compatibility and/or improve DRC,

this is subject for a different thread.

The change of behaviour I do not agree on. The only thing I basically

ask is for is that "show " shows the open pins with

explicit nets at shcematic.

For multi sheet hits where eagle is popping up a list dialog, The pins

not belonging to a segment should show in the list too.

Not showing it is wrong, cause the net is there even if you dont see a

segment/wire.