unpopulated 4 layer board came back shorted between 3v3 and gnd. Cannot find the issue

Hi Fredrik,

Please attach the eagle files that way members can take a look and help you answering your questions.

If you have access to a themal camera, you can put a power supply that has  current control on the two lines.

Either the heat will show up on the camera and indicate where the short is, or the current will burn away the short. A win in both cases.

Just a little scared of the feedback. I know I have violated a lot of best practices.
First attempt routing a 4 layer and might have bitten more than I can chew.

But first mistake might be staying too close to advertised tolerances.

Via/drill in pads

Also my powerplane is a little messy.
Should have cleaned up a few traces and so on.

Cannot attach files... trying to rename the .brd -> .txt

But still get "The content type of this attachment is not allowed."

Don't be scared. The feedback is friendly.

Thanks Jan. Uploaded the brd file to my github

https://github.com/frippe75/Medbee

I kind of started cleaning up the board in general (still wanting to try to solve/understand the issue I'm facing). So if the boardhouse says clearance is 5mil. Changing to 6 mil wouldn't heart as a start.
Read about hairline short circuit and so on and realize I might be oversimplifying the PCB layout magic. Trying to go from white-belt to black-belt without passing a few colors along the way.
Have a USB diff pair that I didn't meander to matched lengths and so on. I will be ordering another itteration of my board but was hoping to get it off the ground at least. But VCC->GND short ruled that out...

My board routed to 98% using the autorouter but this version is me trying to manual route it. If I define nets and setup clearances with a bit of wiggleroom does the autorouter really work or is it always better to route manually?

On 17/02/2019 18:25, Fredrik Tarnell wrote:

Thanks Jan. Uploaded the brd file to my github

 

https://github.com/frippe75/Medbee

 

I think this is your problem. The DRC caught it but you've ignored so

many overlap errors that you didn't see how important this one is.

Attachments:

Hi Rob,

Just think I ignored them in general or a particular one. Have been ignoring the overlaps due to drill in pads and close to pads.
But they are the same signals. Could it be that I'm chasing one via which is "infront" of a another via or something similar?

Have read about that occurring. I.e cloning vias and renaming them but accidentally hitting clone twice and only rename the one "in the front"....

Thanks for replying b.t.w!

Meandring USB signals are advanced topics. Maybe focus on all the basic layout priciples first? Get that USB ones as close to the edge as possible and forget about them. Focus on all those other components.