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Selective thermal relief for thru holes, smt pads, vias in CircuitStudio?

nszmnsky

I often need to change the connection of a polygon depending on what connecting to - for instance, often want direct for vias but X on smt pads. Can this be done in CS? I don't see a way to configure rule for anything other than net, no option for setting what its connecting to.

 

Thanks

Neil

  • 0

    Check the design rules under Plane > Polygon Connect Style > Polygon Connect.

  • 0 in reply to michaelwylie

    I do not see an option to select different connect styles for different features. Only settings are for net and/or layer combinations. I want to not have thermal relief on vias but have them on thru holes for instance.

    image

  • 0 in reply to nszmnsky

    You might have to make an advanced rule. I'm not sure the query you would make though. Check out advanced Rules using the Rule Wizard.

  • 0

    The answer to this question using the built in CS tools is no.  Altium have removed some of the query stuff necessary from AD.  They made a mess of this in my opinion.

     

    However, given this is tool I bought and use, I needed to find a way.  So I manually edit rules outside of CS and re-import them, as the backend is still the same as AD and still works the same way.  See my question over at the eevblog forum for how I do it:

    http://www.eevblog.com/forum/altium/polygon-pour-connection-for-vias/

     

    As an example, below is the contents of the exported and modified .RUL file for no relief on vias, but relief on everything else:

     

    SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=PolygonConnect|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=IsVia|SCOPE2EXPRESSION=All|NAME=PolygonConnect_Via|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=YEEDPGAH|DEFINEDBYLOGICALDOCUMENT=FALSE|CONNECTSTYLE=Direct|RELIEFCONDUCTORWIDTH=10mil|RELIEFENTRIES=4|POLYGONRELIEFANGLE=90 Angle|AIRGAPWIDTH=10mil¶

    SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=PolygonConnect|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=PolygonConnect_all|ENABLED=TRUE|PRIORITY=2|COMMENT= |UNIQUEID=IPIHNEGD|DEFINEDBYLOGICALDOCUMENT=FALSE|CONNECTSTYLE=Relief|RELIEFCONDUCTORWIDTH=10mil|RELIEFENTRIES=4|POLYGONRELIEFANGLE=45 Angle|AIRGAPWIDTH=10mil¶

  • 0 in reply to harvie256

    Thanks harvie256! IF I had a list of design rule options AND IF I wanted to manually create the rules I could accomplish what I need. I still have trouble wrapping my head around the use of rules to control PCB layout. I'm coming from NI Ultiboard where things such as reliefs, min width and spacing are Properties of the item, and each instance of the item can be individually manipulated. Want only one via direct connected? Just click on it and set the property. Want to set the relief style, spoke, and air gap of a polygon? Just click on it and set all those properties in one place. Problem is I haven't upgrade Ultiboard for a few years so have been evaluating other PCB packages to see if I should switch. I do like CS's ability to import from other PCB packages like Eagle as well as from Designer (by exporting as previous version). Of the PCB packages I've looked at, CS has the most plus's  - just not sure enough of them.

  • 0 in reply to harvie256

    As harvie256 said, they removed some helpful things, but the underlaying engine is still there. Same fate for concepts like object classes like net classes or component classes. I hope, altium reconsider this and bring this tools back in release 2.0.

  • 0

    You can make Circuit Studio connect a via to a polygon pour directly and have thermal reliefs for your other pads. It takes a bit of effort though. I made a tutorial here: http://www.eevblog.com/forum/circuit-studio/how-to-selective-thermal-relief-for-vias-and-pads/

  • 0 in reply to Former Member

    Thank You Thank You Thank You for explaining design rules to me.  Transitioning from Altium to CircuitStudio has been a little frustrating but now that I understand CircuitStudio is Altium and I just need to use the workarounds, everything is still possible.  I love the interface of CS better than Altium but I don't like all of the items that have been removed.  This discussion has been a huge help.

     

    I used to use the command IsVia in Altium while declaring polygon connect rules and for CS I have two methods of relief-connects and direct-connects using polygon pours.

    1-Declare everything as a direct-connect unless it is a component.  Priority is key.

    2-Export the Rules, edit them and Import them back in.  Unless you know how to use Altium, this can be difficult.

     

    If someone else is looking for this, I hope that they find it.  I had difficulty searching through the forums.

  • 0 in reply to Former Member

    For anyone else that comes across this, in 1.4 you can now select vias for the match. I did it like this, YMMV.

    image

  • 0 in reply to nszmnsky

    Thanks for the help. This is by far the easiest way to get rid of the thermals.