So, after carrying this idea around since October last year, I finally got my act together and designed/built my RPI Pico RP2040 M.2 dev-board. It is a M.2 2230 card with A and E key and has as many communication interfaces to the M.2 side as possible. USB, UART, I2C and status/control signals. All other GPIOs are on castellated pins on the perimeter of the board. SWD debug interface and +3.3 V/GND is accessible too. 2 GPIOs could be traded for a 4-pin QWIIC header. I tried a poor-mans version of the castellated pins, because the board and assembly house is charging ridiculous amounts for a 3-sided castellation and I knew the board will not go anywhere at all.
But here is the kicker: I received those boards back on Wednesday last week and on Thursday was the big announcement of the brand new RP2350 chip family. I might have waited with the order to take advantage of the superior functionality, but with my un-timely timing I did not have to make this decision. In the end, I do have working boards in hand now and the new chips will not be available for some time. I take that as a win.
I was fascinated by the M.2 interface since I read about it first as a new standard for peripherals (insert obligatory XKCD 927), but it did not catch a good hold in the maker world yet. It is all about professional PCIe SSDs and WiFi cards for now. There was a proof of concept from [Timonsku] about a similar card as mine, but that one did not become an actual product.
Here are some pictures from my board as a proof that it really exists on my bench.
- The board itself (22mm x 30mm is really tiny)
- When the frame for pick&place is about 7 times larger than the board
- 1st test using a USB cable instead of a M.2 connection and getting to blinky
- Schematic pages
And here is a full list of features:
- M.2 2230-D5-AE card (22 mm x 30 mm; D5 = 1.5mm on top and bottom side violated by the QWIIC connector and the bottom SD card holder; A and E key)
- Used interfaces on the M.2: USB, UART, I2C, ALERT, WAKE, DISABLE1/2, LED 1/2, VENDOR_DEFINED
- 1.8V regulator for level-shifters
- Power LEDs for 3.3 V and 1.1 V
- RP2040 peripherals: 2 MB Flash, SWD debug acccess, RESET and BOOTSEL button, QWIIC connector, 1 LED, 1 solder bridge for config, 9 GPIOs on castellated pins
- castellated pins on 25.4 mm/0.1" raster (almost with a 22 mm board)
- optional uSD card holder on the bottom side
It is really hard to find good information when manufacturer use M.2 connections, which interface is present. My current favourite is the RadXA ROCK 3A SBC. This one has USB, UART and I2C on the M.2 connector available. A unit will be on order soon. I will not have a chance to test my board in a real M.2 setup until mid of September, after I am back from traveling.
Currently my initial board has a USB cable soldered with a 3.3 V regulator on the VBUS wire. I will add a 1.8V UART-USB cable and a loopback to the QWIIC connector to test out the other interfaces. And I need to buy the correct uSD holder to have that tested as well. A lot more to test, but getting to blinky is always a good feeling.
I did ignore the PCIe interface for now until a clever mind does an implementation with the use of the PIOs on the RP2040/2350. If anybody sees a major flaw in this design, please let me know in the comments. And I just saw Shabaz' review of the Pirimoni Pico Plus 2 with the comments about castellated pins. Good points, I had to add them because there was just no room for full through holes for GPIO access and my board with the edge connector is not really a good use case to be soldered on a carrier anyways. Hm, maybe it is, when programmed in a M.2 slot and then mounted somewhere else.
My long term plan is to sell this board to the public, but I will probably hold off until the RP2350A is available as chip, unless I get an overwhelming demand response for the current version as it is. In the back of my head is also a M.2 PicoW compatible board, but that is very long term and I am dreading the EMC compliance journey already. Maybe the Pico2W has a full module with integrated antenna.
