Role for FPGA or CPLD with Raspberry Pi

On DesignSpark:

• TAUTIC - CPLD Development Board Review
• http://www.designspark.com/content/tautic-cpld-development-board-review

The red board connected to the black CPLD header is the Bus Pirate he mentions.  I've got one of those, and they're very handy little gadgets.

At that CPLD size, I'd just go with a Xilinx XC9572XL-10TQ100CXC9572XL-10TQ100C in a 44-pin PLCC, which plugs into a PLCC socket, which in turn plugs into a wire-wrap socket or socket strips.  For some reason, I've often found 72 macro-cells to be just enough and 64 macro-cells to be "not quite enough".  XC9500XL are even older than Coolrunner-II, but they're still listed on the top CPLD page at Xilinx.com.

Edit: it seems someone changed my reference to the 9572XL into a full part number including -10TQ100C.  I don't mind, except that the TQ100C is the 100-pin TQFP package.  If you want to wire-wap, you'll need the 44-pin PLCC version which is XC9572XL-10PCG44C.

Good to know that's available in PLCC, thanks.

It's been a long time since I heard anyone mention wire-wrap though.   I have a huge collection of wire-wrap tools and wire and sockets packed away in a trunk somewhere, probably never to be used again. Those were the days ... not necessarily good, but easy.

Just came across this Kickstarter created for digital logic education and it looks to be using that chip:

The Binary explORer boArd (BORA)

http://www.kickstarter.com/projects/545073874/bora-the-binary-explorer-board

In many ways this board looks like quite a good idea but it's totally let down by using an ancient CPLD, the XIlinx XC9572XL-10TQ100CXC9572XL-10TQ100C. Xilinx just don't do CPLDs any more - they go on making some of the old stuff but there's been no effort put in for years.

On the other hand there is good new stuff from Lattice which seems to get ignored by the bulk of engineers who look no further than A or X.

The great thing about using  a modern CPLD is that you can keep it simple if you like and do a few gates in block diagram, Verilog or VHDL but if you want you can embedd a whole processor as well.

I think RPi FPGA needs something better than the XC9572XL-10TQ100CXC9572XL-10TQ100C.

Michael Kellett

Michael Kellett wrote:

 

In many ways this board looks like quite a good idea but it's totally let down by using an ancient CPLD, the XIlinx XC9572XL-10TQ100CXC9572XL-10TQ100C. Xilinx just don't do CPLDs any more - they go on making some of the old stuff but there's been no effort put in for years.

 

On the other hand there is good new stuff from Lattice which seems to get ignored by the bulk of engineers who look no further than A or X.

 

The great thing about using  a modern CPLD is that you can keep it simple if you like and do a few gates in block diagram, Verilog or VHDL but if you want you can embedd a whole processor as well.

 

I think RPi FPGA needs something better than the XC9572XL-10TQ100CXC9572XL-10TQ100C.

My opinion: for the purposes of teaching the fundamentals of digital logic, the XC9572XL-10TQ100CXC9572XL-10TQ100C is a great part.  You can do a lot with those 72 macrocells, well beyond what is needed in a first course on logic.  Xilinx still makes the XC9572XL-10TQ100CXC9572XL-10TQ100C because they still sell -- it's a great way to get a modest amount of instant-on reasonably high-performance logic for about US$1.  With more than 72 macrocells, you probably want an FPGA rather than a CPLD.  I don't see Xilinx as having given up on CPLDs -- I think it's more of an "if it ain't broke, don't fix it" situation.

My decades-old programmable logic bugbear is that the internal architecture is hidden, so you have to use an x86 PC to run the design tools.  Yes, I realize that Xilinx tools run on GNU/Linux and they're free-as-in-beer, but it means that there are no open-source tools so you can't run the design tools on (for example) a RasPi and get a nice self-contained educational package for under US$150 (RasPi + Motorola LapDock + FPGA/CPLD board).  You need to have an x86 PC nearby and run the design tools on it, in which case why bother with the RasPi at all?  Plus the Xilinx tools are IMO complex to use and understand, adding a layer of difficulty to the educational mission.

So here's my question: is the binary format for the XC9572XL-10TQ100CXC9572XL-10TQ100C open or publicly reverse-engineered?  If it is, you get the advantage of doing the logic minimization with open source code and downloading the resulting binary directly from RasPi GPIO.  If the binary format isn't open, the board might as well have a modest FPGA (e.g., Xilinx XC3S50A) or just buy a Lattice iCEblink40 while they're still US$19.

Excellent subject, interesting for education and enthusiasts alike.

So here's a question --- what is the most complex programmable logic device (in the most generic sense of the phrase but not including CPUs) on the market today (old is OK as long as the device is still sold) that can be fully examined and programmed with open source EDA tools?  Since no modern CPLDs let alone FPGAs are open enough for that, what's the best that can be done?

Addendum: The reason for the question is the unfortunate state of affairs outlined by John, which prevents a cheap ARM system from being used as a complete and standalone EDA platform for introductory EE education in programmable logic.  But if we reduced our expectations in terms of modernity and size of programmable logic devices that can be handled, perhaps there is still some milage available there?  Certainly a standalone Pi or other cheap ARM board dedicated to such a function would be a wonderful asset in the FOSS arsenal even if severely limited in device capability.

Excellent subject, interesting for education and enthusiasts alike.

So here's a question --- what is the most complex programmable logic device (in the most generic sense of the phrase but not including CPUs) on the market today (old is OK as long as the device is still sold) that can be fully examined and programmed with open source EDA tools?  Since no modern CPLDs let alone FPGAs are open enough for that, what's the best that can be done?

Addendum: The reason for the question is the unfortunate state of affairs outlined by John, which prevents a cheap ARM system from being used as a complete and standalone EDA platform for introductory EE education in programmable logic.  But if we reduced our expectations in terms of modernity and size of programmable logic devices that can be handled, perhaps there is still some milage available there?  Certainly a standalone Pi or other cheap ARM board dedicated to such a function would be a wonderful asset in the FOSS arsenal even if severely limited in device capability.

Morgaine Dinova wrote:

 

So here's a question --- what is the most complex programmable logic device (in the most generic sense of the phrase but not including CPUs) on the market today (old is OK as long as the device is still sold) that can be fully examined and programmed with open source EDA tools?  Since no modern CPLDs let alone FPGAs are open enough for that, what's the best that can be done?

I had high hopes for the Cypress PSoC5 when I first heard about it, especially after I heard the highly-spirited  Cypress CEO T.J. Rogers talk about at the 2009 ARM conference.  The PSoC5 has a bunch of digital blocks, each of which can have two "12C4" PLDs.  I got discouraged when I found out that they didn't provide enough information in the tech refs to program the routing matrix, insisting I use their proprietary tools.  Perhaps this has changed with newer tech ref editions -- I haven't checked lately.  I always ask about this when I get an opportunity.  It could be a pretty nifty platform for digitial exploration if you could get at all the architectually-defined features.

One thing I particularly liked in Dr. Roger's 2009 presentation was when he mentioned that the basic FPGA patents held jealously by Xilinx and Altera were about to expire, leaving the field wide open to futher innovation.  So who knows?  T.J. is notoriously unpredicatable.

In terms of what can be done right now, there's always Wheeler's Law: ""All problems in computer science can be solved by another level of indirection".  It's an awful way to do it, but you could take a large FPGA and dedicate 80-90% of its LUTs* to form a routing matrix implemented as an array of multiplexers implemented using distributed RAM cells.  The remaining LUTs would be RAMs for implementing n-input logic functions.  I believe you can update the contents of distributed RAM cells over JTAG using Xilinx documentation, so you can update both the logic function and the routing.  Since all routing would be through RAM cells instead of pass transistors, it would be way slower than using an FPGA properly, but as a teaching tool it's "something that can be done now".

I think I heard of this being done some decades ago, but I thought it sounded too silly to remember the details.  Actually, it was I who was silly, thinking FPGA vendors would see the wisdom of opening up their configuration formats.

Glossary:

LUT = Look-Up Table.  Most FPGAs implement logic functions with small RAMs, each of which implements an n-input arbitrary logic function using brute-force table lookup, where n is 3 to 6 depending on the FPGA.

I think we are perhaps confusing our aims a little here.

To learn basic digital logic there is nothing to beat gettting going with a breadboard and  a handful of 74 or 4000 series chips. You can see all the nodes with a cheap scope and you don't need any other tools except a pencil and paper. If you have the determination you can make some interesting stuff.

I'm not at all happy with this "teaching" talk re the RPi - I thought it was meant to be about Discovery, Invention and Improvisation such as we saw in the early days of micros and cheap home computers like the Spectrum. So I was assuming that if someone adds an FPGA to their RPi thay want to able do something exciting with it  - we can't all play with Ferraris but we can all be let  loose with a decent modern FPGA !

With regard to open source tools - as far as I can tell there aren't any worth using and the tools from the FPGA vendors need big computers to run, Linux is no problem but you need lots of RAM and lots of hard disk. No one in their right mind would want to run a  VHDL simulator doing anything much on tiny computer like the RPi (just too slow). So we may as well accept the world as it is, and right now that means FPGA simulation and compilation on a PC or MAC.

Michael Kellett

The question is: Should VHDL simulators run so slowly as they do? I think not.

SHOULD a VHDL compiler require a big computer? I think not.

If say I want to calculate pi to 1 billion decimal places I inherently need around 1Gb of memory. Or 512Mb if I go BCD. But as FPGA configurations fit in a few megabytes even for quite large ones, there is no inherent reason to that an FPGA compile needs to use large amounts of memory.

The vendor's FPGA tools have become big clunky pieces of software because they were incrementally developed by lots of different programmers.

A good Open source redesign would yield a much sleeker program.

@Roger,

As you protest that an open source FPGA design toolset would be so much better than the efforts made by several different teams of pretty good people in the FPGA industry I'm reminded of  a passage from Jane Austen's Pride and Prejudice:

During a discussion about playing the piano, Lady Catherine remarks, “If I had ever learnt, I should have been a great proficient.”

Michael Kellett

Michael Kellett wrote:

 

To learn basic digital logic there is nothing to beat gettting going with a breadboard and  a handful of 74 or 4000 series chips. You can see all the nodes with a cheap scope and you don't need any other tools except a pencil and paper. If you have the determination you can make some interesting stuff.

While you are most certainly entitled to your opinion, the first thing I thought of when reading your comment was "you're living in the past, man".  I've designed logic that way, and IMO it's a PITA compared to a good simple clean CAD system with an FPGA target.  With a breadboard, if you make a mistake you have to rip up and reconnect the wires, and it's way too easy to hook up the wrong wire.  Any significant project is going to end up with a nasty rat's nest.  In comparison, with a good simple clean CAD system a learner can make nice logic diagrams and/or write Boolean equations and play with them on the screen to get a good idea whether the design works before downloading to an FPGA to press real Springwerk and watch actual Blinkenlights.

N.B. I don't know of any good simple clean CAD systems available at this time.  Most FPGA design systems available from vendors are very complex and IMO quite daunting to someone trying to learn logic, and each release gets more complex.  JMO/YMMV

Yeah, in Dutch we have the saying "De beste stuurlui staan aan wal". Litterally the best shippers are on the shore, meaning it is easy to critisize those who actually have to DO it.

And I'm sure there would be a few "snags" to work out when you'd do things again. Some of which would require more memory than I'd guess now. But having seen Quartus start up, you know immediately that there is too much bloat, as just the gui alone already takes a gigabyte of memory.

A design program like eagle has a commandline. Most don't use that. But it makes sense for design programs like eagle, mentor chip design and quartus. That means that your gui can remain quite lightweight. In eagle for instance, the gui need only startup a "show the current schematic" subprogram if the "schematic" window is open.

@John,

I don't advocate breadboarding as a cost effective way of designing complex logic for commercial purposes but it is still a good way to learn. Simulating on paper and  implementing with physical parts teaches many lessons - not the least of them that thinking before doing can save a lot of time. Although many of my designs use FPGAs I still use gate level logic chips from time to time - it isn't the past yet.

@Roger,

I was teasing you of course and happy to learn the Dutch way of saying it !

I agree that the vendor systems do seem very bloaty - I use Aldec HDL for design/simulation (about 300Mbyte install image) and Lattice Diamond for synthesis/debugging (2Gbyte zipped install image). There is a lot of overlap - Diamond actually includes a version of the Aldec tool and the Aldec tool loads up its own versions of the Lattice libraries.

I find the Lattice toolset to be the easiest to use (which might just be familiarity) of the vendor tools I've tried - it's certainly no more daunting to use than running Linux !

Michael Kellett

Michael Kellett wrote:

 

With regard to open source tools - as far as I can tell there aren't any worth using and the tools from the FPGA vendors need big computers to run, Linux is no problem but you need lots of RAM and lots of hard disk.  No one in their right mind would want to run a VHDL simulator...  So we may as well accept the world as it is, and right now that means FPGA simulation and compilation on a PC or MAC.

Digital CAD tools, including FPGAs, used to be my main research area a couple of decades ago.  I ran into a lot of really smart people who could have done amazing things with FPGA tools and FPGA applications if they hadn't been locked out by the vendors.  Sure, you can create generic algorithms and architectures and publish papers about them, and even get tenure doing such things, but it's nowhere as much fun as making things that really work so the kinds of visionaries who need that thrill will quite simply work on something else.

Xilinx does a good job with their tools, and with skill you can write Verilog that will produce hardware that's reasonably close to what you want.  OTOH, if you make a minor change to the Verilog and suddenly the tools want an extra 20 LUTs, good luck trying to track down what the synthesizer did.

I once asked an obnoxious question at an FPGA workshop related to whether it's a good idea for a silicon vendor to insist that you only use their tools.  I asked the group "How many of you have used an Intel processor?"  (Everybody raised their hands.)  Then I asked "How many of you have used an Intel compiler?"  (Maybe one or two hands -- who remembers PL/M?)

In terms of accepting the world as it is, I'll quote GBS:

George Bernard Shaw wrote:

 

The reasonable man adapts himself to the world; the unreasonable one persists in trying to adapt the world to himself.  Therefore all progress depends on the unreasonable man.

 

... or unreasonable woman, of course.

Michael Kellett wrote:

 

@Roger,

 

As you protest that an open source FPGA design toolset would be so much better than the efforts made by several different teams of pretty good people in the FPGA industry I'm reminded of  a passage from Jane Austen's Pride and Prejudice:

 

During a discussion about playing the piano, Lady Catherine remarks, “If I had ever learnt, I should have been a great proficient.”

Nice quote!  But the FPGA lockout reminds me of two lines from Tom Lehrer's "Whatever Became of Hubert":

Tom Lehrer sang:

 

Second fiddle's a hard part, I know,

When they don't even give you a bow.

For the record, I'm not saying open source tools would have better quality than vendors' tools.  I'm saying opening the programming bit streams would open up new applications (such as seriously-reconfigurable computing) and allow far more people to learn about FPGAs and become proficient in using them, resulting in far more FPGA chips being sold.

In any event, my question was prompted by a much less ambitious goal, a desire to have (and to help in developing) an open source EDA tool that is able to read, design for, and program some elementary programmable logic device, no matter how old and basic, as log as it's still being manufactured and sold.  That's a far cry from other worthy goals like better quality than vendors' proprietary software or less bloaty or more efficient.

Nevertheless, it would be a start, and at least for some small projects and for some types of education, I'm sure that such open tools would be perfectly adequate, no matter how unimpressive the target device.  And from small seeds can grow impressive trees.

But to do that, one first has to identify some openly documented target device, and it seems that our list of possible candidates is empty at this point.