I found those DSI and CSI connectors puzzling from the start.
The Pi already provides two display options as standard, HDMI and composite video. Although some people will be interested in a 3rd option such as a MIPI Alliance display board attached to the DSI connector, it seems very peculiar to be increasing the BOM cost of every Pi manufactured by incorporating this 15-pin DSI connector into the design. After all, it is certain to be only of minority interest as a result of the 2 other options being available as standard.
The CSI-2 interface is also a 15-pin MIPI Alliance connector, and it's another peculiar choice to find on every Pi. After all, webcams are universal, low cost, and attach through USB which Pi already supports, so only a very small minority are likely to be interested in purchasing a dedicated CSI camera board. And yet, as with the DSI connector, this extra burden has been added to the BOM cost of every Pi, even the $25 model A.
It doesn't seem to make much sense on cost, to my way of thinking, and there is yet another non-monetary "cost" to consider --- adding those two 15-pin MIPI connectors must have contributed PCB layout/routing difficulties as well, and has probably meant that other useful signals were not brought out.
Given the above, it's worth speculating what another Raspberry Pi model could be like, if those two connectors were crossed off the list for a hypothetical new Raspberry Pi Model C.
The simplest case just removes those two connectors and replaces them with nothing. This could be enough to warrant a new price point for the Model C, below the $25 mark, particularly if the tracks and the corresponding vias are removed along with the connectors. In the quest for a lower price point, perhaps even the current GPIO headers and corresponding tracks could be considered optional as well..
A much more interesting case would be to remove DSI and CSI but add another row of GPIO-type headers on the opposite edge of the board to the current 26-pin P1. This would provide the physical support for a daughterboard which many people have suggested would be useful. I suspect that the SoC has plenty of other interesting signals that could be routed to such a second row of headers.
Morgaine.
