RPi rev 2.0 explained

It is really a great thing that they already released the schematics and gerbers for the new board !!

-J

I noticed immediately that there are three "cpuinfo" codes reserved for RasPi 2.0: 4, 5, and 6.  The obvious guess is that they're for Model B 2.0, Model A, and Model B w/ 512MB.

That's a great post by Eben!  Clear, concise, informative, and without adding pointless social embellishments nor ego polishing.  If I were over there I'd be giving him strong positive feedback.  Hopefully someone will encourage him to make posts of that nature just before the expected day of a new version being released, to keep things on the level.

And as if that wasn't good enough, I was very pleased to see this exchange:

JBeale wrote:

 

        "non plated mounting holes" - how can it be at ground if it is non-plated?

 

eben replied:

 

        Ah yes, my bad. Looking at the board carefully, I can see they're actually isolated.

This is why I like Eben a lot.  He behaves like an engineer, accepts errors, moves on to the next thing.  Pity that his level-headed influence doesn't spread much.  The Foundation would be such a good place if everyone followed that role model.

Morgaine.

jamodio wrote:

 

It is really a great thing that they already released the schematics and gerbers for the new board !!

Really???!!!  Woot!!!  Was that announced somewhere, or they just silently appeared somewhere?

John Beetem wrote:

 

I noticed immediately that there are three "cpuinfo" codes reserved for RasPi 2.0: 4, 5, and 6.  The obvious guess is that they're for Model B 2.0, Model A, and Model B w/ 512MB.

Maybe they already found another issue, so the codes are for Model B 2.0, Model B 2.1, Model A 2.1.

The PoP RAM is mobile LPDDR2 400MHz 1.2V in an FBGA168 package, 32bits wide.  Digikey prices for 1000 quantity are $15.20 for 256MiB, $24.48 for 512MiB.  (And $36.72 for 1GiB, but we think the SoC does not support that.  They do not even sell 128MiB any more.)

Those prices are not tremendously meaningful, because nobody would buy this stuff from digikey, and it is not even a stocked item.  But it does seem very likely that a Model B+512 could be made for $50.  Whether the RPF would want to do it is another matter.  There is a risk of future software requiring the extra memory and failing to run on the hundreds of thousands of units already sold.  (It would be good for their rivalry with BeagleBoard/TI, though.)

Morgaine Dinova wrote:

 

jamodio wrote:

 

It is really a great thing that they already released the schematics and gerbers for the new board !!

 

Really???!!!  Woot!!!  Was that announced somewhere, or they just silently appeared somewhere?

I think Jorge is being gamesome -- "this is merriment".  If I'm wrong, could someone please post a link or add it to the RasPi Hardware wiki: http://elinux.org/Rpi_Hardware#Schematic_.2F_Layout

I think Jorge is being gamesome -- "this is merriment".  If I'm wrong, could someone please post a link or add it to the RasPi Hardware wiki: http://elinux.org/Rpi_Hardware#Schematic_.2F_Layout

They are on the same page where they posted high res pictures of the new board together with additional documentation much better than the supermarket list written by Eben.

If somebody knows the URL please let me know ...

BTW, what is their interpretation of a major revision ? Calling this new board 2.0 is a big joke.

-J

> 1GiB, but we think the SoC does not support that.

Actually, Gert has explained that  the SoC will support 1GB,

but he didn't think any suitable 1GB PoP ram chips were available at the time,

which is I believe where the supposed 512MB limit came from.

http://www.raspberrypi.org/phpBB3/viewtopic.php?f=2&t=3950&start=4

So it's possible that the version 4, 5, and 6 refers to 256MB, 512MB,

and 1GB. 

Good link, thanks.  In that case I think the Micron 512MiB part I was looking at may not be suitable, since it has two dice.  I can not get sufficient data from Hynix to determine if their 512MiB needs more than one chip select.  Samsung seem to have a suitable part, but their website does not show it in mass production.

I wonder why there is (has always been) reference to "Micron PoP 44nm 2x2Gbit" in start.elf, if this configuration cannot be addressed, however.

So when will they annonce the 512mib version?