Why does the Wolfson Audio Card use two I2C buses?

Question

I want to use my Pi with Wolfson card as a headless recording device, so I need some buttons and status LEDs. While researching how to do this I found out that the I2C bus can have multiple devices on it including I/O expanders, but this leaves me with more questions than answers!

1) If you can have multiple devices on the bus why does the Wolfson card need to use two?

2) Perhaps one is saturated? If so which?

3) Perhaps they're clocked differently? Which is better to add buttons to, if it matters at all?

4) Maybe one is configured as a slave the other master? Which is better to add buttons to, if it matters at all?

5) The expander I'm looking at has a fixed address of 65, will that conflict with anything on either (or both) of the buses?

All of the above are things I don't know how to find out (sadly the source code is above my understanding) but sound like they could be important.

Can anyone help?

Thanks

Marki555 · Accepted Answer

OK, so after reading the schematics file carefully:

i2c from P1 is connected to the WM8804 chip (SPDIF). Driver probably uses it to set some SPDIF parameters.

i2c from P5 is unavailable, because its pins are used for i2s interface (I2C0_SDA as PCM_CLK and I2C0_SCL as PCM_FS).

SPI from P1 is connected to the main audio codec WM5102 (to its CIF2 control pins).

WM5102 i2c interface (CIF1) is connected only to Wolfson expansion header. It is possible to configure WM5102 independetly via this i2c. It is slave only with i2c address either 34h/35h (w/r) or 36h/37h (w/r).

So the main chip is configured by the driver using SPI, the SPDIF is configured using i2c. In theory you should be able to tap to the i2c pins and use them if you want.

P1 connector pins:

8+10 are on expansion header and are RPi UART (can be configured to GPIO)
12+16 (GPIO_A, GPIO_B) are connected to the SPDIF chip. The chip runs in HW mode with 2-wire (i2c) control interface (both pins held low by pull-downs during reset). GPIO_B is probably used to set the audio interface format of the SPDIF chip (between 24-bit i2s and 16-bit right justified). However it seems WM5102 supports only the 24-bit i2s, so I don't know if this pin is used (and if it configured in RPi as input or output??)
18 (GPIO5) is connected via level shifter (3v3 to DBVDD1 - voltage of AIF3 i2s interface) to GPIO5 of WM5102.
22 (GPIO3) is connected directly to GPIO3 of WM5102 and to expansion header (also as GPIO3). That would mean that GPIO3 is available for general use
24 (RST_8804) is connected to RESET pin of SPDIF chip (WM8804)
26 (RPI_SS, on RPi labeled as SPI0_CE1_N) is connected via level shifter to WM5102 as CIF2_SS (SPI Slave Select Input)
3 + 5 (RPI_SDA, RPI_SCL) are connected to i2c interface of SPDIF chip
7 (MCLK2) is connected via level shifter to MLCK2 if WM5102, which is Master Clock 2. This can be used as a reference to i2s clocks, but I doubt that RPi can output anything such high-frequency on normal GPIO port (need to check how it is configured in WM5102 registers??)
11, 13, 15 (RST, IRQ, LDOENA) via level shifter to RESET, IRQ and LDOENA (enable for voltage regulator) pins of WM5102
19, 21, 23 (RPI_MOSI, RPI_MISO, RPI_SCLK1) via level shifter to WM5102 SPI interface

So to conclude, only available are those pins on expansion header:

GPIO3 (P1 pin 22, RPi GPIO25), also connected to GPIO3 of WM5102
UART TX/RX, not connected to anything on Wolfson card
i2c connected to WM5102 via level shifter (can only be used to control the WM5102 chip itself and you need i2c master device for that); maybe connect it to main RPi i2c bus? (on the expansion header they are already at 3v3 voltage level, so should be safe)

All other pins are connected to some chips of the Wolfson card, but it is unclear if they are actually in use. This can be investigated by looking at the configuration registers of WM5102 either via SPI (if available outside of driver) or i2c which is available on the expansion header.