RP2350 GPIO Pull-down Latching Bug

Looks like the input buffer on the io pads is goofed.

A simple test, drive an IO pad with a source impedance of 10 kOhms

With the Input buffer disabled and Pull Up/Down Disabled

mem32[0x40038000+4]=0x000

The IO pad doesn't load the 10kOhm source, as it should Ie being high-impedance.

With the Input buffer enabled and Pull Up/Down Disabled

mem32[0x40038000+4]=0x040

The IO pad is sourcing and sinking current and loading the source resistance.

As a high impedance input it should not source or sink ANY current.

Cool work on verifying/clarifying this Bug/Issue!

Is that the same scenario as the bug report? I read it as: only impacting with the pull-down enabled.

They didn't do a great job explaining the issue. The issue is the input buffer sources current into the IO pin, so the electrical characteristics table is wrong.

The pin latches in pull-down mode because this input buffer sources more current than the pull-down resistor can sink.

The leakage of the input buffer looks something like the following.

The built-in pulldown resistors are strong enough to overdrive this weird input buffer, so one could also just add their own 10K pull-down resistor on board. 

It's the root cause of the latching effect.

The input buffer leakage is greater than what the pull-down resistor can sink, so the IO stays high until you either

Yank the pin low with a bigger pulldown resistor

or disable the input buffer.

Nice work verifying the issue. Not that it matters, but out of curiosity - which board(s) do you have?

It would be interesting if they will share what current path is turned on when the buffer input switches high. Maybe it’s related to the enable circuit.

I guess it’s not a horrible hardware or software workaround for someone with just a few boards.  Seems like vendors got a lot of board variants out quickly.  Wonder what they will do?

> Wonder what they will do?

They announced that they won't fix silicon or adapt the API, but will use documentation to deal with it.

Thanks!

I guess I got lucky with timing and managed to picked up a few Pico 2's

The GPIO pin only has a connection to the RP2350, which should be the same as most RP2350 boards.

The input buffer has some strange input bias/leakage current

I too would be interested to know what the actual cause is.

If whatever is driving the IO pin has a source resistance less than 10kOhms (most digital outputs are), than it isn't really a showstopper.

Trying to measure the charge time of a capacitor or a push button connected to VDD (with out a pull-down resistor) could be problematic...

The RP2350 datasheet was updated today with an improved description of the IO pin errata