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  • Author Author: Jan Cumps
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Hercules microcontrollers, DMA and Memory Cache

Jan Cumps

DMA and memory cache don't always play nicely together.

I had an issue when trying to use serial communication and DMA on a TI Hercules controller. The DMA data wasn't appearing in my read buffers.

TI's application specialists helped me to resolve my issues. It was related to ARM memory cache settings.

I've written a step-by-step guide on the hackster.io forum on that subject.

 

 

Due to the subject, this hasn't turned into an easy-to-read novel. I hope it may help fellow developers struggling with similar issues.

 

When you're playing with DMA, you think everything is working ok, and you don't see any data written to your variables, this post may be worth looking into.
It's based on an SCI example, but applicable in many DMA situations.

 

Default Cache configuaration is write-back:

image

For DMA relevant buffers, you can specify a chunk of RAM with write-through configuation.

image

There's more to do than just setting aside a portion of the memory. Check the video for a quick overview, and the hackster.io blog post for a step-by-step explanation with a working project attached.

 

The Series
0 - Buffers and Parallel Data Lines
1a - Buffers and DMA
1b - SPI without Buffers
2 - SPI with Buffers
3a - SPI with DMA
3b - SPI with DMA works
4a - SPI Master with DMA and Parallel Data Lines
Hercules microcontrollers, DMA and Memory Cache
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  • in reply to clem57

    Yes. In this case it's even more close. The SCI peripheral is on-chip.
    Still it's necessary to configure direct write-through (an other option - that I haven't investigated - is to force a standard ARM cache commit).

     

    If I have the need for it, I might investigate the performance difference between configuring part of the memory non-cached or force an ARM apply-cache at the moment I need the DMA data.

    At this moment I don't have an itching problem to be solved, so I'll leave it as an exercise for others image...