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Connector Technology & Design
Forum How to implement USB 3.0 with Altera Cyclone III FPGA ?
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Related

How to implement USB 3.0 with Altera Cyclone III FPGA ?

apatro
apatro over 15 years ago

I am planning to implement USB 3.0 interface for Altera Cyclone III FPGA board. The need for USB 3.0 came from more speed requirements. SuperSpeed USB 3.0 supports a maximum data rate of 4.8 gigabits per  second offering 10x performance increase over Hi-Speed USB (USB  2.0).

 

Comparison  of USB 3.0 to USB 2.0

Features
USB 3.0
USB  2.0
Speed
Upto 4.8 Gb/s
upto 480 Mb/s
Signaling
Dual-simplex four wire differential   signaling
Two wire differential signaling
Data  flow
Full duplex
Half  duplex
Power Management
Multi-level which supports idle, sleep, and   suspend
Port-level that has two levels of   entry/exit latency
Cable  types
Shielded  differential   pair (SDP)
Unshielded twisted pair  (UTP)
Cable Wires
8 total
4 total
Traffic  Flow
Asynchronous
Polled
Packet  Traffic
Explicitly routed
Broadcast to all devices

What functional block and peripheral devices should be required in the Cyclone FPGA board design to implement SuperSpeed USB 3.0 interface ?Any suggestions/comments will be much appreciated.

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  • apatro
    0 apatro over 15 years ago
    How about to use Texas USB1310 PHY IC for USB3.0 interface ? Any suggestion or tips ?
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  • Former Member
    0 Former Member over 15 years ago in reply to apatro
    Can I have the reference design using USB1310 PHY?
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  • apatro
    0 apatro over 15 years ago in reply to Former Member

    you can refer this link where a top level architecture is shown -

    http://www.slscorp.com/pages/ipusb30sls.php

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  • ngadhia
    0 ngadhia over 14 years ago in reply to apatro

    Check out the tutorial video at: http://vimeo.com/26366020

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  • ngadhia
    0 ngadhia over 14 years ago in reply to apatro

    Check out the tutorial video at: http://vimeo.com/26366020

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