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Affordable Versal parts and their penetration in hobbyist circles

unixux

Good day all,

It's been a while since relatively affordable Versal boards came around - at least two sub-$1000 parts from reputable suppliers are available, as well as very interesting board that combines AMD Ryzen with Versal Edge device (that's a tad more expensive though- but still a far cry from the full sticker for the big devkit boards). All are based on the same xcve2302 part - SOM actually. And considering the amount of innovation that Versal ACAP brings to the table - and the AI revolution we're living through, one could naively expect an explosion in both content and support. But it's been relatively lackluster thus far. To an untrained eye there is very little cross-pollination from non-ACAP projects into Versal and those who do target it tend to just support the big expensive parts. (Not to take away from whatever content that _does exist - it's very informative and interesting to those who seek)

What's missing in this scenario - is it vendor support, or hobbyist interest, or is the added value from new technology still not perceived sufficient to justify the cost ?

  • in reply to dyessgg

    It appears to be zQSFP with 4 GTYP Transceiver

  • in reply to erik__18

    From what I have understood it is really useful for application that target AI applications. So you should be able to exploit the AI engines in the fabric. If you are only using the programmable fabric (called "Versal adaptable engines"), you might be better off with Zynq SoC's or MPSoC's.

  • in reply to erik__18

    I think that if you compare it with NVidia's Orin Nano, at least the original idea was that NOC+AIE-ML gives you the relevant aspects of a GPU but also the programmability aspect. You get to deploy same basic model concepts but with Versal you get to synthesize your hardware to run it - as big or as tight as you need it to be, with a customizable connectivity to match. The whole thing can meet timing on clocks that are multiple times what original SOCs could
    In some - more then one - ways this reminds me of EPIC ISA of Itanium2 (AIE-ML have VLIW architecture so similarities are palpable). At the time, the issue was for the most part lack of development tools. Or rather a proper, coherent vision for development tools and articulation of that vision. 

    But today is different - an entire new macrocosm nebulously referred as AI stands poised to benefit from taking advantage of the kind of flexibility ACAP+NOC bring to the table.
    The bad news is that while all this progress sounds great on paper, in reality there is a very pronounced jump in complexity, vendor lockup, outright cost. lack of available designs and tiny ecosphere when compared to alternatives. Those risks are sunk cost to a decision to go Versal, while benefits of progress are yet to be reaped. 
    My opinion is direly unqualified but I think that to realize the immense potential of Versal, AMD and her partners will need to invest a lot more in the low tiers - tiers that don't translate into immediate millions sales, but do set the mindset for generation. 
    For one, publicly available "The Zynq book" and "Exploring Zynq+ MPSoc" does wonders for the respective subject platforms. With Versal, you have to grind through UGs and reference designs and pray you'll bump into an answer. 

  • in reply to michaelkellett

    These issues are very real - and when we're talking about smaller commercial projects, justifying Versal complexity is easily prohibitive. But EE hobbyists aren't the type of people to be deterred by sheer complexity. And any modern SOC platform is immensely complex - Zynq+ book runs 644 pages and UGs have no bottom. But at least there is a plethora of documentation and reference designs a/k/a other people's code that can come to ones rescue - and that's what I find most lacking with Versal.

    After all. abstracting away complexity is natural to any tech progress. One doesn't need to fully understand Zynq and ARM to put together a nice relatively fancy SDR from affordable, documented parts like Zedboard with fmcomms2 (i got one running in 30 minutes, and i'm barely qualified to place a flipflop). I could never do that with a Versal part though. But people behind Versal and those boards certainly could make it doable - if they saw a future in progress. Alas zynq seems to be to AMD what iPhone is to Apple - if there was only original iPhone and a nuclear powered iPhone 20 with a soldered on Ferrari, a manual in Shumerian and no screen. 

  • in reply to unixux

    This is maybe conversation for another topic but, I don't fully get the AI thing in FPGAs. Wouldn't be more sensible to have the PCI-e IP using a fast transciever and sell a board with the FPGA+AI accelerator? In the end I see FPGAs sold for 15k with big letters saying 30 TOPS... while there are jetsons out there that achieve 100TOPS for around 1k