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  • ZUBoard High Speed IO (J6) used by MIPI CSI-2 Rx IP on PL side

    JChen
    JChen
    I have two questions before to purchase ZUBoard 1CG + Avnet The dual-camera mezzanine: 1) For camera image processing, can I use Xilinx DPU IP on PL side from this ZUBoard development board? 2) Is this ZUBoard development board to support M...
    • 19 Jun 2025
  • Lattice iCEstick EVB Generating Three-Phase Sinewaves with Sigma-Delta DACs Using iCEcube2 and VHDL

    jc2048
    jc2048
    Introduction A good while back, when I purchased an ADALM1000, I realised that Farnell had the Lattice ICEstick back in stock so I bought one of those too. I thought it would be nice to do a simple project, with a few of my impressions of the board ...
    • 15 Jun 2025
  • Mini Project for learning HDL/Verilog: Making a part of a very small processor

    Aritra2k2
    Aritra2k2
    Hii all, This is me first time posting here on element14. I recently completed a Hardware Description of a part of a processor in Verilog. In this mini project, I ensured the datapaths, added 7 registers ( 6 normal and 1 special). The special registe...
    • 7 Apr 2025
  • RPI Camera Fun with Zynq-UltraScale+ : LIBCAMERA

    RPI Camera Fun with Zynq-UltraScale+ : LIBCAMERA

    albertabeef
    albertabeef
    Introduction This project is part 4 of a N part series of projects, where we will explore how to integrate Raspberry Pi cameras on Zynq-UltraScale+ boards. Part 1 : RPI Camera Fun with Zynq-UltraScale+ : RPI Cam V2 Part 2 : RPI Camera Fun ...
    • 3 Feb 2025
  • RPI Camera Fun with Zynq-UltraScale+ : White Balance

    RPI Camera Fun with Zynq-UltraScale+ : White Balance

    albertabeef
    albertabeef
    Introduction This project is part 3 of a N part series of projects, where we will explore how to integrate Raspberry Pi cameras on Zynq-UltraScale+ boards. Part 1 : RPI Camera Fun with Zynq-UltraScale+ : RPI Cam V2 Part 2 : RPI Camera Fun ...
    • 27 Jan 2025
  • RPI Camera Fun with Zynq-UltraScale+ : RPI Cam V3, HQ, AI

    RPI Camera Fun with Zynq-UltraScale+ : RPI Cam V3, HQ, AI

    albertabeef
    albertabeef
    Introduction This project is part 2 of a N part series of projects, where we will explore how to integrate Raspberry Pi cameras on Zynq-UltraScale+ boards. Part 1 : RPI Camera Fun with Zynq-UltraScale+ : RPI Cam V2 Part 2 : RPI Camera Fu...
    • 29 Dec 2024
  • RPI Camera Fun with Zynq-UltraScale+ : RPI Cam V2

    RPI Camera Fun with Zynq-UltraScale+ : RPI Cam V2

    albertabeef
    albertabeef
    Introduction This project is part 1 of a N part series of projects, where we will explore how to integrate Raspberry Pi cameras on Zynq-UltraScale+ boards. Part 1 : RPI Camera Fun with Zynq-UltraScale+ : RPI Cam V2 Part 2 : RPI Camera Fu...
    • 23 Dec 2024
  • Tria Vitis Platforms — Adding support for ROS2

    Tria Vitis Platforms — Adding support for ROS2

    albertabeef
    albertabeef
    Introduction This project is part 5 of a 5 part series of projects, where we will progressively create AI enabled platforms for the following Tria development boards: ZUBoard Ultra96-V2 UltraZed-7EV These projects can be rebuilt using the source co...
    • 25 Nov 2024
  • Tria Vitis Platforms — Adding support for Hailo-8

    Tria Vitis Platforms — Adding support for Hailo-8

    albertabeef
    albertabeef
    Introduction This project is part 4 of a 5 part series of projects, where we will progressively create AI enabled platforms for the following Tria development boards: ZUBoard Ultra96-V2 UltraZed-7EV These projects can be rebuilt using the source co...
    • 18 Nov 2024
  • Tria Vitis Platforms — Adding support for Vitis-AI 3.5

    Tria Vitis Platforms — Adding support for Vitis-AI 3.5

    albertabeef
    albertabeef
    Introduction This project is part 3 of a 5 part series of projects, where we will progressively create AI enabled platforms for the following Tria development boards: ZUBoard Ultra96-V2 UltraZed-7EV These projects can be rebuilt using the source co...
    • 11 Nov 2024
  • Tria Vitis Platforms -   Creating a Common Platform

    Tria Vitis Platforms -   Creating a Common Platform

    albertabeef
    albertabeef
    Introduction This project is part 2 of a 5 part series of projects, where we will progressively create AI enabled platforms for the following Tria development boards: ZUBoard Ultra96-V2 UltraZed-7EV These projects can be rebuilt using the source co...
    • 4 Nov 2024
  • Tria Vitis Platforms — Building the Foundational Designs

    Tria Vitis Platforms — Building the Foundational Designs

    albertabeef
    albertabeef
    Introduction This project is part 1 of a 5 part series of projects, where we will progressively create AI enabled platforms for the following Tria development boards: ZUBoard Ultra96-V2 UltraZed-7EV These projects can be rebuilt using the source co...
    • 28 Oct 2024
  • How to build Xilinx Default HDL Project for zcu102 in Window?

    ijazmuhammad
    ijazmuhammad
      Video link: https://studio.youtube.com/video/nSbfVxOD5vk/edit Courtesy to:         https://wiki.analog.com/resources/fpga/docs/build Prerequisites: Prerequisites: Vivado installed Steps to build: Cygw...
    • 17 Oct 2024
  • My first step into the FPGA world

    strb
    strb
    Almost a year ago, I received a very nice surprise from e14. Unfortunately, until now it sat aside, waiting for some love. This is going to change soon! The board The CMOD S7 from Digilent is a very nice little board, fitted with a Spartan 7 FPGA at ...
    • 18 Aug 2024
  • Lattice iCEcube2 Now a Subscription Licence

    jc2048
    jc2048
    This will apply to anyone designing with the iCE40 parts, including the iCEstick board. When I came to do my yearly renewal for the iCEcube2 design software, I discovered that it is now subscription based (previously it was free). The prices are here...
    • 29 Jul 2024
  • Design and Development of Keyword Spotting Module using MFCC algorithm for Robotic Movement on PYNQ-Z1 Board

    kishankarthik2008
    kishankarthik2008
    IntroductionCurrent Scenario:  Is a spoken word audio dataset intended to aid in the development and evaluation of keyword recognition systems? Explains the appeal of this task as a challenge and the need for a unique dataset that is distinct fr...
    • 19 Jun 2024
  • Booting ZUB1CG with AES-ACC-DPEMMC-G

    Z_Gaby
    Z_Gaby
    Discover the capabilities of the AES-ACC-DPEMMC-G module, including DisplayPort output and eMMC storage, and learn how to integrate it with ZUB1CG (Zynq UltraScale+ boards).
    • 15 May 2024
  • Software Defined Transceiver Redux

    ad0es
    ad0es
    My last project: Direct Fourier Conversion Software Defined Transceiver turned out to be un-workable...  I'm going to re-tool with a new board, and decided to start a new  blog from scratch. I ordered this board today: It uses a KINTEX-7 F...
    • 26 Feb 2024
  • Need Datasheet for AES-XRF16-CC-G-D

    nc1
    nc1
    Please provide the full datasheet (pinout, board requirements, interfacing information, etc) for AES-XRF16-CC-G-D. The manual the AVNET website is very minimal. Thank you. 
    • 23 Feb 2024
  • Update Kria Boot Firmware on SOM before installing Ubuntu version 22.04

    skruglewicz
    skruglewicz
    This post we’ll go through the steps for updating the boot firmware of your Kria SoM. I describe how I updated my Kria SoM boot firmware on the KV260 starter kit. If you are unaware Ubuntu 22.04 is NOT compatible with the Boot Firmware that com...
    • 21 Jan 2024
  • The Art of FPGA Design - Post 40

    fpgaguru
    fpgaguru
    Instantiating the DSPFP32 the Easy Way The final thing we need to use the new Versal DSPFP32 hardened floating point primitive is a way to access them through VHDL code. While it would be very nice to be able to infer the primitives, especially since...
    • 24 Dec 2023
  • The New DSPFP32 Primitive in Versal FPGAs

    fpgaguru
    fpgaguru
    The New DSPFP32 Primitive in Versal FPGAs The DSP primitive in the latest Versal FPGA family is called DSP58 and it already has a number of improvements over the latest DSP48 flavors, mainly an increase from 27x18 signed multiplier and 48-bit post ad...
    • 19 Dec 2023
  • The Art of FPGA Design - Post 38

    fpgaguru
    fpgaguru
    VHDL-2008 FP32 Support in Vivado VHDL-2008 introduced native support for floating point types with FLOAT, which is an arbitrary precision floating point type. While you can define generic modules with ports of unconstrained FLOAT type, or any actual ...
    • 2 Dec 2023
  • Direct Fourier Conversion Software Defined Transceiver

    ad0es
    ad0es
    Decided to expand on my last project: dfcSDR Problem of the moment: This board just isn't gonna work out. Moving to a Kintex 7 board: Software Defined Transceiver Redux ============================================================ Ordered this board ...
    • 25 Aug 2023
  • Direct Fourier Conversion Software Defined Radio using Cuda Processing

    ad0es
    ad0es
    This blog will document my effort to make an SDR receiver using an Artix-7 FPGA reading multiple ADCs and sending the raw 16 bit samples over PCIe. Problem of the moment: Too many projects ... not enough time! =======================================...
    • 18 Jun 2023
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