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  • Direct Fourier Conversion Software Defined Transceiver

    ad0es
    ad0es
    Decided to expand on my last project: dfcSDR Problem of the moment: Figure out how to use Aurora. ============================================================ Ordered this board from Amazon: AX7A200 It's similar to the board I used in the last pro...
    • 25 Aug 2023
  • Direct Fourier Conversion Software Defined Radio using Cuda Processing

    ad0es
    ad0es
    This blog will document my effort to make an SDR receiver using an Artix-7 FPGA reading multiple ADCs and sending the raw 16 bit samples over PCIe. Problem of the moment: Too many projects ... not enough time! =======================================...
    • 18 Jun 2023
  • OrangeCrab Game Console pt. 4 - Sprites

    dang74
    dang74
    The last blog covered the generation of background tiles. This time around we'll look at another facet of retro graphics.  This one in my opinion is much more exciting: Hardware Sprites! Beginnings of a Journey Growing up in the 1980s the s...
    • 31 May 2023
  • FPGA and DSP ep. 4: Polyphase Filters

    dhmarinov
    dhmarinov
    Hello there, I just posted a video on YouTube about Polyphase filters. You can check it out here:  https://youtu.be/06XRSkkfhek Cheers! PS: looks like I forgot to post the 3rd episode, which is about Half-band FIRs.  You can find it in the ...
    • 14 May 2023
  • Blinking a LED with PYNQ in Kria KV260 / KR260

    rajivbishwokarma
    rajivbishwokarma
    1. Introduction In this article, we will install PYNQ in Ubuntu 22.04 and then I will show you how to do a simple LED blinking using Python in PYNQ. 2. Installing PYNQ in KV260 The Xilinx/Kria-PYNQ is the main repository for everything related t...
    • 13 May 2023
  • Booting Ubuntu 22.04 in Kria KV260 (or KR260)

    rajivbishwokarma
    rajivbishwokarma
    1. Introduction In the previous article, we looked at how we can upgrade the Kria SOM firmware to make it able to boot Ubuntu 22.04 (without the firmware, it can only boot Ubuntu 20.04). In this article, we will build on that and boot the OS. Bo...
    • 13 May 2023
  • Kria (KV260/KR260) firmware update for booting Ubuntu 22.04

    rajivbishwokarma
    rajivbishwokarma
    1. Introduction KV260 and KR260 firmware by default cannot boot the Ubuntu 22.04. Therefore, an update to the firmware is necessary. In this article, I will show you how to update the firmware step by step. I have the following setup. Petalinux boot...
    • 13 May 2023
  • Port a VHDL design from AMD Zynq & Pynq to Spartan-7 & MicroBlaze - part 2: software

    Jan Cumps
    Jan Cumps
    Part 2 of a little double post to document the porting of a small FPGA design from a Zynq with ARM + Linux + Pynq + Python to a smaller Spartan with MicroBlaze soft controller + bare metal. In post 1, I show the Vivado ...
    • 11 May 2023
  • Port a VHDL design from AMD Zynq & Pynq to Spartan-7 & MicroBlaze - part 1: hardware

    Jan Cumps
    Jan Cumps
    A little double post to document the porting of a small FPGA design from a Zynq with ARM + Linux + Pynq + Python to a smaller Spartan with MicroBlaze soft controller + bare metal. The post focuses on the software / firmware aspec...
    • 9 May 2023
  • Learning AMD Zynq: a project to generate a set of PWM signals. 3 - add GATE signal and demodulation clock

    Learning AMD Zynq: a project to generate a set of PWM signals. 3 - add GATE signal and demodulation clock

    Jan Cumps
    Jan Cumps
    Continuation of  Learning AMD Zynq: a project to generate a set of PWM signals. 2 - add overall control block, delay and pulse signal .  yepe has a goal to create a set of signals for an ultrasone pulse generator. Status after Po...
    • 6 May 2023
  • Learning AMD Zynq: a project to generate a set of PWM signals. 2 - add overall control block, delay and pulse signal

    Learning AMD Zynq: a project to generate a set of PWM signals. 2 - add overall control block, delay and pulse signal

    Jan Cumps
    Jan Cumps
    Continuation of  Learning AMD Zynq: a school project to generate a set of PWM signals. 1 - problem statement and possible approach .  yepe has a goal to create a set of signals for an ultrasone pulse generator. Status after Post ...
    • 4 May 2023
  • Learning AMD Zynq: a project to generate a set of PWM signals. 1 - problem statement and possible approach

    Learning AMD Zynq: a project to generate a set of PWM signals. 1 - problem statement and possible approach

    Jan Cumps
    Jan Cumps
     yepe has to resolve this problem for a project assignment: Hi Jan Cumps, I hope you don't mind if I ask a question regarding the PYNQ half-bridge PWM driver. I am working on a student project for school and I need to drive a half-...
    • 21 Apr 2023
  • Vitis-AI 3.0 designs for Ultra96-V2 and ZUBoard

    Vitis-AI 3.0 designs for Ultra96-V2 and ZUBoard

    albertabeef
    albertabeef
    Avnet has just released a series of projects that builds up Vitis-AI 3.0 and ROS2 enabled designs for Ultra96-V2 and ZUBoard. Type Description ZUB1CG Links U96V2 Links Hackster 1 Building the foundational designs https://avnet.me/...
    • 16 Apr 2023
  • How can I choose FPGA?

    Former Member
    Former Member
    Hi, I am Arun. I am  a hardware Engineer with 8years experience in in IoT and RF schematic and pcb design. I am new in FPGA design. How can I start my career in FPGA based design? Kindly advice the initial steps.
    • 1 Apr 2023
  • Fast VHDL CORDIC Sine and Cosine Component on Lattice XP2 Device Using Diamond 3.12

    Fast VHDL CORDIC Sine and Cosine Component on Lattice XP2 Device Using Diamond 3.12

    jc2048
    jc2048
    Introduction This is still work in progress - I've only reached the simulation phase and haven't tried it on a device yet - but I thought it might be of some interest. Back when I did my 'Making Waves' blogs [1], I implemented a fast, unrolled, pipel...
    • 31 Mar 2023
  • AMD Xilinx 7 series FPGAs XADC

    SystemVerilog Study Notes. AMD Xilinx 7 series FPGAs XADC

    javagoza
    javagoza
    Introduction In the previous blog,  FPGA ADSR envelope generator for sound synthesis , we discussed ADSR envelope generators. The data input to the ADSR module was hardcoded. It would be nice to be able to enter the step increments wit...
    • 20 Mar 2023
  • SystemVerilog Study Notes. FPGA ADSR envelope generator for sound synthesis (I)

    SystemVerilog Study Notes. FPGA ADSR envelope generator for sound synthesis (I)

    javagoza
    javagoza
    ADSR envelope generator for sound synthesis. In the previous blog we implemented a Direct Digital Frequency Synthesis module (DDFS ) that can generate an unmodulated audio-frequency tone. In this blog we will implement an ADSR (attack-decay...
    • 11 Mar 2023
  • DDFS Direct Digital Frequency Synthesis for Sound

    SystemVerilog Study Notes. DDFS. Direct Digital Frequency Synthesis for Sound

    javagoza
    javagoza
    DDFS - Direct Digital Frequency Synthesis DDFS is a digitally-controlled method of generating multiple frequencies from a reference frequency source. DDFS is a method of producing a tunable digital or analog waveform. First the data points of the wav...
    • 19 Feb 2023
  • OrangeCrab Game Console - Part 3

    dang74
    dang74
    PCB Assembly Within a couple of weeks of placing my order the boards arrive.  I am a sucker for the white solder mask.  It has a shine not unlike the keys of a piano and I like the way it contrasts with the black silkscreen. I am not well ...
    • 6 Jan 2023
  • Making a Vivado Development Board Reference Design Your Own

    ad0es
    ad0es
    Decided to recreate the process of going from a vendor provided reference design to a first version of my project. I've literally gone thru more than a dozen iterations of this process to gain the knowledge of how to do it properly. The vendor's refe...
    • 29 Dec 2022
  • Installing Xilinx Vivado on Ubuntu 20 & 22

    ad0es
    ad0es
    Work in progress... In the above screen grab  I chose the COMPLETE set of files. It's huge, but was worth it considering how many attempts it took to finish a clean installation! Doing a complete installation also seems to eliminate some is...
    • 24 Dec 2022
  • Simple Dev Board for Efinix Trion FPGAs

    michaelkellett
    michaelkellett
    I just posted this blog in my personal blog, which on reflection might not have been the best place. So here's a link to it. (because I can't see how to move it.)  Simple Dev board for Efinix Trion FPGAs  MK
    • 10 Dec 2022
  • OrangeCrab Game Console - Part 2

    dang74
    dang74
    Patiently Waiting for the PCBs In these high-inflation times I try to be frugal where I can.  I've ordered boards from China in the past and while the PCB prices themselves are very affordable the $20 or so for express shipping isn't nec...
    • 5 Dec 2022
  • Master project for FPGA VHDL with Digilent Arty - Artix-7

    WDV
    WDV
    Dear friend, I am a new master's student, I need help with my master's project. I have a Digilent Arty - Artix-7 board. what kind of project I can research for 2 years?
    • 20 Nov 2022
  • OrangeCrab Gaming Console - Part 1

    dang74
    dang74
    Introduction One of the advantages of membership in the Element14 community is the opportunity to evaluate brand new products and technologies.  Back in 2021 during the summer of FPGAs I was lucky enough to be selected to road test the Oran...
    • 7 Nov 2022
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