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Threads
543 Discussions
Frequently Asked
Sharing vivado projects
Not Answered
over 2 years ago
Vivado and Zynq: TRI-STATE help
Not Answered
over 3 years ago
i2c bus in zynq
Not Answered
over 3 years ago
Issue with blk_memory after design & wrapper
Not Answered
over 2 years ago
How to fix DMA initialization failure?
Not Answered
over 2 years ago
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Discussion
Hardware Manager unconnected. Autoconnect crashes
200
views
8
replies
Latest
6 days ago
by
sam_jones
Not Answered
WiFi SD Card application
0
162
views
2
replies
Latest
22 days ago
by
bradfordmiller
Not Answered
Some challenges with FPGAs?
0
96
views
0
replies
Started
23 days ago
by
lostintheether
Suggested Answer
Vivado 2020 "No ARM Processor Found in Design"
0
4111
views
9
replies
Latest
1 month ago
by
brhn
Discussion
Help Object detection and tracking with color space conversion and morph operators
224
views
1
reply
Latest
1 month ago
by
brhn
Discussion
Turing my M5stack core2 to a flipper
476
views
1
reply
Latest
2 months ago
by
JWx
Suggested Answer
Using waveshare CANopen interface with zcu102
0
633
views
9
replies
Latest
2 months ago
by
phoenixcomm
Not Answered
Setting up CAN interface for Xilinx ZCU102
0
545
views
9
replies
Latest
2 months ago
by
bugtech
Discussion
Zynq PS Spi and Quad Spi referance design tutorial Help
280
views
0
replies
Started
4 months ago
by
brhn
Discussion
ZUB1CG board file or ref design, Vivado 2019.2 version
430
views
3
replies
Latest
5 months ago
by
manihatn
Suggested Answer
Which NVMe does AES-ACC-HSIO-M2-G accessory board accommodate?
0
294
views
2
replies
Latest
5 months ago
by
iksevas
Discussion
Affordable Versal parts and their penetration in hobbyist circles
1195
views
15
replies
Latest
5 months ago
by
erik__18
Discussion
(solved) Did you manage to debug a Microblaze RISC-V with Vitis Unified IDE (2024.1) ?
1067
views
5
replies
Latest
5 months ago
by
Jan Cumps
Discussion
Vivado, Vitis and PetaLinux on Windows Sublayer for Linux (WSL2): solve xsdb segmentation fault
544
views
1
reply
Latest
5 months ago
by
bidrohini
Discussion
Vivado, Vitis and PetaLinux on Windows Sublayer for Linux (WSL2): connect to the USB debugger as a normal user
214
views
0
replies
Started
5 months ago
by
Jan Cumps
Discussion
Vivado, Vitis and PetaLinux on Windows Sublayer for Linux (WSL2): attach and detach your USB debugger
393
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0
replies
Started
5 months ago
by
Jan Cumps
Not Answered
Get this on the dmesg "macb ff0e0000.ethernet eth0: Could not attach PHY (-19)"
0
818
views
1
reply
Latest
6 months ago
by
bidrohini
Discussion
Install Vivado, Vitis and PetaLinux on Windows Sublayer for Linux
8717
views
13
replies
Latest
6 months ago
by
Jan Cumps
Discussion
in L3 Corner Track example. Why the flow buffer needs to be created everytime in loop?
185
views
1
reply
Latest
6 months ago
by
phoenixcomm
Discussion
Seeking Feedback on Your Preference for an AMD Kria Workshop
1134
views
14
replies
Latest
7 months ago
by
erik__18
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