For the next blog, I plan to

• show some internal signals
• test how the circuit behaves when there is an identical signal on both inputs (desired/theoretical result: no output signal)
• go into the design, maybe based on Art of Electronics:

Does AoE say how you use the 'active load', or do they just give you that partial schematic?

It's not going to work well open loop - the operating point and the gain that results as the two sources (the mirror output and the diff pair output) fight comes from the slopes specified by the Early voltages, and they're not well characterised, and not necessarily balanced between the PNP and the NPN part. [It works best used with further stages and then overall feedback to determine the operating point and the actual, precise gain.]

Besides which, that's not how Shabaz is using the mirror, anyhow. He's got it the other way round so that it's mirroring the output current that flows in the passive resistor load as feedback to the other transistor in the diff pair. It's unconventional, and I'm not very sure what all the consequences of doing that might be. It seems to give a small amount of loop gain (which we might expect to [slightly] improve the distortion performance (maybe not - the diode-connected transistor at the mirror input is itself a major source of distortion in the output), lower the output impedance, maybe give some PSRR, and all those kinds of benefits that you get from feedback). The biggest obvious problem is the higher gain on the left side will drive the other diff pair transistor into the saturation region with larger input signals, compromise the operation of the diff pair, and result in the sudden onset of output distortion. And it's all a bit uncontrolled, and most definitely the simulation won't get it right because the Early voltages in the transistor models probably won't be very typical of the actual parts.

If you view an FFT of the output, do you see the output distortion suddenly rise at some point as you increase the signal level? It should be around the same point that the waveform on the other side limits against the lower transistor collector.

As to the current source in the tail of the diff pair, the two transistors would lead to a higher slope on the current vs voltage characteristic, which you would think would result in more output distortion (over the simpler, one-transistor sink), but maybe Shabaz was adjusting that to partially counter one of the other distortion sources.

Does AoE say how you use the 'active load', or do they just give you that partial schematic?

They elaborate on the current source and on the active load. The dedicated subsection "Biasing with a current source" and "Current-mirror active load" give (short) background.

I'll do the extra measurements when the heat wave is over...

Does AoE say how you use the 'active load', or do they just give you that partial schematic?

They elaborate on the current source and on the active load. The dedicated subsection "Biasing with a current source" and "Current-mirror active load" give (short) background.

I'll do the extra measurements when the heat wave is over...