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Who wants to have FPGA fun for free?

fustini

Back in April, I attend an outstanding talk by Jack Gassett at The specified item was not found. entitled:

 

Designing an Open Source Arduino/FPGA Development Board

The Papilio is a low-cost, open-source FPGA development board intended for education, hobbyists, engineers, or anyone interested in learning digital electronics in general and FPGAs in particular. Add-on application modules called "Wings" help make the Papilio an easy-to-learn platform for beginners and a powerful design and prototyping tool for engineers. Of particular interest is that the FPGA on the Papilio can be configured with a soft Arduino processor core, thereby allowing the Papilio to run Arduino programs.


In this session, the creator of the Papilio – Inventor Jack Gassett –will present a technical tour describing how the system is implemented and discuss the design decisions he made along the way. Also discussed will be the ways in which users can plug their own peripherals into the system using VHDL or schematic entry; also how users can take existing cores from sites like OpenCores.com and integrate them into the Papilio's Arduino soft processor core.

Jack was kind enough to give a Papilio board to me along with a "MegaWing" daughterboard:

imageimage

 

Papilio One

The Papilio is an Open Source FPGA development board based on the Xilinx Spartan 3E FPGA (datasheet). It has 48 I/O lines, dual channel USB, integrated JTAG programmer, 4 power supplies, and a power connector. It provides everything needed to start learning Digital Electronics.

imageimage

Papilio LogicStart MegaWing

The LogicStart MegaWing provides everything needed to get started with VHDL and FPGA development on the Papilio with one convenient and easy to connect circuit board.

Learn VHDL with Mike Field's free book written specifically for the Papilio and LogicStart MegaWing. Step by step examples and full source code walks you through using all the peripherals on the LogicStart.

Dive into the exciting world of customizable Soft Processor's with the ZPUino. Custom peripheral's such as a ZX Spectrum compatible VGA adapter and classic audio chips are just a few of the exciting possibilities. The LogicStart gives you peripherals to experiment with!

 

I thought I would pass on the favor to another member of element14 Community. I'm going to give both of these boards for free it to one lucky Community member (sorry, no minors, you must be 18 years of age or older):


    1. Reply to this post with a short description of why you are interested (1 to 2 sentences is fine)
    2. I'll will pick a winner at random on Tuesday, Septemeber 10th, at 7pm US CDT.

 

Note: I'm located in Chicago and will ship it for free to the winner using the lowest cost option available.  If the winner is located outside the US, then the winner will be responsible for paying any customs fees or duty that may apply.  I will list the value as $78 USD.

 

 

Cheers,

Drew

http://twitter.com/pdp7

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  • I already have the One (please don't include me in the random selection - or if you do, I also agree,  I'd like  billabot to try it out!). It is a great board.

  • in reply to shabaz

    shabaz wrote:

     

    I already have the One (please don't include me in the random selection - or if you do, I also agree,  I'd like  billabot to try it out!). It is a great board.

    Thank you for the mini-review.  I'm planning to get a Papilio at some point.  I'm currently working on FPGA design software  -- mostly front-end and simulation for now, since FPGA vendors haven't published enough architectural information to do physical design.  However, when vendors wise up to the advantages of having an open FPGA architecture I want to be ready.  So while I'm tempted to enter Drew's contest, I'd rather have it go to someone who can use it right away.

     

    I still have an old Spartan-II development board which I've used for a number of projects.  I really like the Spartan-II and Spartan-3 architectures and use the Spartan-3A for client FPGA designs.

  • in reply to johnbeetem

    John Beetem wrote:

     

    Thank you for the mini-review.  I'm planning to get a Papilio at some point.

    Another cool board maybe for those who want to do gaming type experiments with an FPGA is 'minimig', which is 90% of a Commodore Amiga on an FPGA (minus the CPU which is a real hardware 68000). I obtained one a while back but not had a chance to try it yet.

    coder27 wrote:

     

    VHDL can be run without a FPGA board, using GHDL.

    This is spot on, and is worth doing because it would need to be done for a real design anyway (I've not used this particular simulator).

    Many non-computer-scientists may not know about the importance of a high-level design, modules specification and testing with software based projects and so they may get away without doing that for small C programs, but it becomes super-important very quickly with FPGAs (regardless of Verilog or VHDL - I personally thought I would find Verilog easier, but I've only used VHDL and now I'm trying to give Verilog a decent shot, but the conclusion is that neither are easy to start), so it needs patience and planning, as well as the understanding to stick to certain ways of expressing things until one gets confident of what it will end up creating in hardware. In a way, it needs to be studied in parallel with digital design. Possibly today's engineers may need to be able to use both languages, and to be prepared to read and try lots of exercises in books!

  • in reply to shabaz

    shabaz wrote:

     

    (... but I've only used VHDL and now I'm trying to give Verilog a decent shot, but the conclusion is that neither are easy to start), so it needs patience and planning, as well as the understanding to stick to certain ways of expressing things until one gets confident of what it will end up creating in hardware.

    This is a problem with synthesizing Verilog, and I assume with VHDL as well.  To do good FPGA design, you first have to visualize the digital hardware that you want, and then cajole the synthesizer into creating the logic you have visualized.  The synthesizer (I've mostly used Xilinx's XST which is part of the free Web tools) has a bunch of templates for synthesizing various useful things like latches, flip-flops, and dual-port RAM but you have to write your Verilog code the correct way so that XST matches the templates and maps to the correct FPGA resources.  It helps a great deal if you've designed your own digital CAD tools image just like you can write better C code if you've written compilers.

     

    Determining that XST has generated the correct logic is a pain.  Xilinx does have a tool for automatically generating schematics, but they're IMO practically useless except for very small designs.  I'd much rather have a bunch of synthesized equations like you get with a CPLD.

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  • in reply to shabaz

    shabaz wrote:

     

    (... but I've only used VHDL and now I'm trying to give Verilog a decent shot, but the conclusion is that neither are easy to start), so it needs patience and planning, as well as the understanding to stick to certain ways of expressing things until one gets confident of what it will end up creating in hardware.

    This is a problem with synthesizing Verilog, and I assume with VHDL as well.  To do good FPGA design, you first have to visualize the digital hardware that you want, and then cajole the synthesizer into creating the logic you have visualized.  The synthesizer (I've mostly used Xilinx's XST which is part of the free Web tools) has a bunch of templates for synthesizing various useful things like latches, flip-flops, and dual-port RAM but you have to write your Verilog code the correct way so that XST matches the templates and maps to the correct FPGA resources.  It helps a great deal if you've designed your own digital CAD tools image just like you can write better C code if you've written compilers.

     

    Determining that XST has generated the correct logic is a pain.  Xilinx does have a tool for automatically generating schematics, but they're IMO practically useless except for very small designs.  I'd much rather have a bunch of synthesized equations like you get with a CPLD.

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