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  • Author Author: Jan Cumps
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GaN Point of Load converter 48V to 1V 50A - part 2: Current Doubler

Jan Cumps

I'm reviewing a Gallium Nitrate step-down converter for Point of Load (PoL) high power conversion.

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This design is intended to deliver low voltage (0.5 - 1.5V) at a power hungry point of load. It can source 50A. With a switching frequency of 600 kHz, the footprint can stay small.

 

Part 1 gives a high-level overview of the design. The converter is interesting for more reasons than just being GaN. There are a few advanced switch-mode conversion patterns used in the evaluation kit.

One of the specifics of this design is the Current Doubler at the secondary stage.

 

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In this design, the output current is divided over two inductors that each take half the current. Rectifying is done by two transistors (in our design: 2 times 2 GaN FETs) that are driven by the same PWM signal that drives the primary side half-bridge.

A few advantages of this design:

  • simpler transformer: no need for a center tapped design.
  • current shared over 2 inductors, so they can be smaller and heat isn't concentrated on a single spot.
  • significant part of the output current is canceled because current in the two sides of the output is (almost) inversed and a significant chunk cancels itself out -> smaller output capacitor needed.

There are more advantages and trade-offs with this design. It requires current control instead of voltage contrlol. You have to use phase-shift controlled PWM; Duty-cycle controlled PWM won't do.

There's a document available on the ti site that explains the design in depth.

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image: phase-shifted HI and LO control signals.

 

Here's the effect of the ripple canceling with a current doubler:

The two secondary sides are in essence two switching converters that run interleaved. Not exactly 180°. The controller uses phase shifted PWM to drive the two sides and the current that runs trough both inductors is a saw-tooth, not a 180° mirrored triangular signal.

So even though the cancellation isn't perfect, a significant amount of the ripple disappears because of the signals being fairly close to inverse. That allows us to reduce the output filter capacitors.

 

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A second win is that the resulting ripple current has double frequency. So that allows us to reduce the capacity once more.

In TI's evaluation kit, the two output transistors are each a pair of EPC2023 GaN transistors. They are driven by the same signal that drives the LMG5200 GaN Half-bridge on the primary:

A somewhat simpler design is documented with a wealth of oscilloscope captures of the operation, control signals and the current doubling and canceling.

 

 

Blog Posts
part 1: Design Overview
part 2: Current Doubler
part 3: Dynamic Test Load
Related Blog
Checking Out GaN Half-Bridge Power Stage: Texas Instruments LMG5200 - Part 1: Preview
  • in reply to Jan Cumps

    Posting this here for the follow up blog post:

     

    in: 40 V; 21 mA, 0.840 mW

    load DAC 10000 (1.17A unconfirmed)

     

    Single shot (does not show managing load with phase)

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    Normal triggered now. Blurred parts in the waves left and right of the trigger point (aided by infinite persistence) show how phase is shifted to manage load:

     

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    (1: primary side switching node. 2: Drain 1. 3: Drain 2)

  • in reply to Jan Cumps

    Little side note: syncing two channels on a Rigol power supply:

     

    The device I'm testing is configured to deliver 1 V, up to 50 !! A, from a source between 36 and 75 V.

    The input I'm using is a power supply that has 3 outputs. 1 and 2 can deliver 30 V, number 3 can give 5 V.

    Because the internals of this supply, I can use 1 and 2 in series, to deliver up to 60 V (number 3 can't be added to deliver an additional 5, but that's not the subject of this post).

     

    A neat function of the DP832A supply I'm using, is that I can make channel 1 and 2 "track".

     

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    Once I enable full tracking, I can adjust voltage and output switch-on/off from the channel 1 controls. Channel 2 follows automatically.

    A nice little aid to make using stacked channels easier.

  • I have this on the desk again. I'm now testing it with the homemade electronic load.

     

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    Output current is 4.86 A. Output is 0.99 V. = 4.81 W

    Inputs 36.10 V * 0.15 A  = 5.42 W:

    I have to add 0.38 W consumption for the controller to the consumption part, making it 5.80 W consumed power vs 4.81 W delivered.

    Efficiency is 83%. A little bit lower (possibly reading errors from my side) than the almost 85% of the TI documentation.

     

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    This is an interesting setup - with the two output circuits delivering part of the output each.

     

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    The yellow trace is the gate of Q3. The Blue line is drain of Q3, the purple the drain of Q4.

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    In reality, things are no so subtle. This is a subst of the design, showing the same FETs and inductors.

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    All FETs are GaN devices. On the primary side, the half-bridge sits in a single package. On the secondary side, Each one is actually two GaN FETs in parallel.

  • in reply to DAB

    Maybe it's because when you dampen ringing, you loose energy?

     

    Here's a capture of the primary switching node when the source is 60V and the output is generating 0.982V 18A

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  • in reply to Jan Cumps

    Interesting.

     

    Given the current and rate of current change, I am not surprised that they just go with the result.

    Trying to fix the ringing would probably be complicated and detract from the intended use of the board.

    I suspect that most applications will not be bothered by it, though it might impact an idea I have.  I won't know until I build the circuit and test it.

     

    DAB