This post documents the ADC firmware for the electronic load we made here on element14.
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The DAC-ADC BoosterPack
Output pin assignments
All pins isolated from LaunchPad if P1 and P2 open.
P1 and P2 are for BoosterPack testing only, to deliver power to the DAC, ADC and REF ship when no power board is connected.
In the final design, P1 and P2 need to be open and the power board has to provide GND and V+ for these 3 ICs.
It should be at least 3V (ISO min. VCC2 requirement) and max 5V5 (max rating for ADC). Let's use 3V3 to 5V.
| Pin | Dir | Name | Description |
|---|---|---|---|
| P3.1 | analog out | VREF | future |
| P3.2 | analog out | DAC D | future |
| P3.3 | analog out | DAC C | future |
| P3.4 | analog out | DAC B | future |
| P3.5 | analog out | DAC A | current control voltage |
| P3.6 | analog in | ADC A | actually set current readback |
| P3.7 | analog in | ADC B | sense voltage at device under test or terminals |
| P3.8 | analog in | ADC C | temperature |
| P3.9 | analog in | ADC D | future |
| P3.10 | depends on P2 | GND | should come from power board GND if we run isolated (P2 open) |
| P4.1 | depends on P2 | GND | should come from power board GND if we run isolated (P2 open) |
| P4.2 | depends on P1 | 3V3 | should come from power board if we run isolated (P1 open). 3V3 - 5V |
| P4.3 | digital out | i²C SCL | future |
| P4.4 | digital in/out | I²C SDA | future |
BOM for pcb version 1_2:
Changes between versions of the ADC/DAC pcb:
| proto | package | V1_1 | package | V1_2 | package | |
| oshpark | seeed | seeed | ||||
| ISO1541DRISO1541DR | 8-SOIC | ISO1541DRISO1541DR | 8-SOIC | ISO1541DRISO1541DR | 8-SOIC | |
| REF5020IDREF5020ID | 8-SOIC | REF5020AIDGKTREF5020AIDGKT | 8-VSSOP | REF5020AIDGKTREF5020AIDGKT | 8-VSSOP | |
| DAC8571IDGKRDAC8571IDGKR | 8-VSSOP | DAC8571IDGKRDAC8571IDGKR | 8-VSSOP | DAC8574IPWDAC8574IPW | 16-TSSOP | |
| ADS1115IDGST | 10-MSOP | ADS1115IDGST | 10-MSOP | ADS1115IDGST | 10-MSOP | |
| bodge | U3 Vsense to VOUT | U3 Vsense to VOUT | ADCs labeled reverse on the PCB. D=A, C=B, B=C and A=D |
Solder advice: in hindsight I should have used larger IC packages. The board isn't easy to solder at home. But it's doable with proper care, hand stability of a snooker player and eyesight of an eagle. It's best to leave capacitor C5 off and solder it separately when the other components (in particular U2) are mounted. Even then it may be good to move it as far as you can from U2's pins. I didn't provide enough clearance in my PCB design. The VSSOP footprint of U2 is narrow on the V1_2 board. If you are brave, you can use pliers to bend the pins a bit down. I cut of the pins 5, 7 and 8 with a hobby knife. |
For measurements on this board, check Programmable Electronic Load - ADC and DAC BoosterPack test.