The Module 2 of the MiniZed Path to Programmable is focused on software development in xilinx fpga. After viewing the training videos; this module is about Vivado SDK and SDK Application development flow. The previous minized hardware development ZYNQ blogs can be read here Summary of Module 1 Path to Programmable ZYNQ HW blogs
The Software related blogs are here Summary of Module 2 Path to Programmable ZYNQ SW blogs
After generating the zynq HW the board support packages from the HW platform are imported into the SDK. The SDK is an eclipse based tool (Based on Eclipse 4.5.0 and CDT 8.8.0) so quite easy to work with as many engineers are aware of the Eclipse tool-chain. It has software design and debug flows supported, including multi-processor and hardware/software co-debug abilities. There is also a large suite of libraries and device drivers available in the SDK.
Fig: SDK Application development flow and how it works
More detailed info on Vivado SDK can be read here https://www.xilinx.com/products/design-tools/embedded-software/sdk.html. The Software Development Kit can also be downloaded as Standalone here https://www.xilinx.com/support/download/index.html/content/xilinx/en/downloadNav/embedded-design-tools.html
Module 2 Lab 0
This is a repetition from the previous Lab0 in the ZYNQHW Module 1. It talks about installation of Vivado, creating the right folder paths, installing TeraTerm for serial communication. Since I have them ready from previous setup I moved quickly to Lab 1.
Fig: Reminding the SoC Block Diagram
Module 2 Lab 1
Experiment 1: Review the Hardware Platform Archive
This experiment shows where you will find the exported Zynq Hardware Platform within a Vivado project directory structure. This starting lab is also pretty simple. All the .c, .tcl, .h file contents are compressed as a single .hdf file here means Z_system_wrapper.hdf. The .hdf contains the information about software applications in SDK. It is the only file to be sent from hardware to the software guys and by decompressing this .hdf all the important headers and c files are seen. A detailed description about the meaning of each of the files was explained and must be understood for future projects.
Fig: Decompress and get all the needed files for software
Module 2 Lab 2
Experiment 1: Launch SDK. Create a Workspace in the SDK_Workspace directory. Import the Zynq hardware platform reviewed during Lab 1.
Experiment 2: Examine the Hardware Platform
SDK uses Workspaces for software development files. This workspace has meta-information about the project and other files such as logs, c files header files. Each workspace has minimum 1 HW platform but there can be many BSPs and software applications designed for the one HW platform.
Importing and Examining the pre-created .hdf file into vivado SDK.
Fig: Creating HW platform Specification
Reading all the compressed files in .hdf in SDK
A summary of all the zynq software SDK labs can be found here Summary of Module 2 Path to Programmable ZYNQ SW blogs