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  • Author Author: tariq.ahmad
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3D Object Rendering Using an FPGA -- Episode 558

 

Rendering of 3D models is a computationally expensive task and often slow. With hardware customization and reprogrammable flexibility using FPGAs, highest performance can be achieved. So we are going to build customized hardware on a FPGA Cyclone IV E (DE0 nano board) to render 3D objects into images, and finally, display the rendered images on a monitor over VGA. I have used Verilog for the hardware implementation so that the code can be easily compiled for most FPGAs out there. Happy Rendering!

 

Supplemental Material:

Bill of Material:

Product Name Manufacturer Quantity Buy Kit
Development Kit, Altera Cyclone IV FPGA , DE0-Nano, 2x GPIO Headers, 32MB SDRAM, Accelerometer TERASIC TECHNOLOGIES 1 Buy Now
 

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Wire Gauge:28AWG

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  • in reply to surbhika

    That board has a Zynq processor which has more on chip logic than the Arty board. It costs a bit more but the price per LUT is probably lower.

    If its a good board for you depends very much on what you are trying to do.

    The Pynq process is a lot further abstracted from the hardware than using Verilog. The Zynq is a Linux application processor with an FPGA bolted on. (I know you can run other software on it but in reality you can only go where the support is.) If you look at the questions on forums and support sites about Zynq boards you'll find a very large proportion are about Linux and how to work around the enormously complex Vivado/Vitis toolset.

    If you want to learn how to make a good GPU, or how to efficiently translate complex maths alogithms into hardware, then stick with Verilog or VHDL, keep away from the Zynq and stick with pure FPGAs.

    As DAB woud say, just my 2c worth.

    Other people will have different opinions.

    MK

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  • in reply to michaelkellett

    Also, I think the project is already more interesting without the Zync processor, and harder for people to replicate or port across if they don't have the same device.

    Also, wondering, since GPUs are normally very parallel, if (say) FPGA boards eventually become a limit for the design you're implementing, perhaps the architecture can be paralleled across additional FPGA boards in future. That could be an extremely interesting element14 presents video too!