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Azure Sphere Starter Kit
Forum What is the maximum current the MT3620 GPIO pins can output?
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  • azurespherech
  • azure sphere
  • azuresphkt
  • azure sphere starter kit
  • mt3620
Related

What is the maximum current the MT3620 GPIO pins can output?

javagoza
javagoza over 6 years ago

What is the maximum current the MT3620 GPIOs pins can output?

All the pis provide the same current?

Can you configure any of the pins to have high drive strength (i.e 20-mA)?

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Top Replies

  • javagoza
    javagoza over 6 years ago in reply to clem57 +2 suggested
    Hi, clem57 , thanks for the link. I don't see any indication of high-drive GPIOs support in that repository, nor at https://docs.microsoft.com/en-us/azure-sphere/hardware/mt3620-product-status, nor at…
  • peterfenn
    peterfenn over 6 years ago in reply to javagoza +2 verified
    Enrique MT36230 GPIOs can be configured for higher drive strengths (per the MT3620 M4 Datasheet document which is available via NDA). I recommend this type of question be asked on the MSDN Azure Sphere…
  • peterfenn
    peterfenn over 6 years ago in reply to javagoza +2 suggested
    My understanding is that drive-strengths are configurable from the M4 code. I'd suggest besides the OS feature request, also request support for the M4-based settings in the MSDN forum
Parents
  • wizio
    0 wizio over 6 years ago

    This is "default" Mediatek GPIO structs for cortex-M4 ...

    Try find offsets https://github.com/Azure/azure-sphere-samples/blob/master/Samples/GPIO/GPIO_RTApp_MT3620_BareMetal/mt3620-gpio.c#L19

     

     

    struct {

        volatile uint32_t RW[2];

        uint32_t RESERVED[4];

    }GPIO_DRV_REGISTER_T;

     

    struct {

       

        GPIO_REGISTER_T GPIO_IES;

        GPIO_REGISTER_T GPIO_PD;

        GPIO_REGISTER_T GPIO_PUPD;

        GPIO_REGISTER_T GPIO_PU;

        GPIO_REGISTER_T GPIO_R0;

        GPIO_REGISTER_T GPIO_R1;

        GPIO_RDSEL_REGISTER_T GPIO_RDSEL;

        GPIO_REGISTER_T GPIO_SMT;

        GPIO_REGISTER_T GPIO_SR;

        GPIO_TDSEL_REGISTER_T GPIO_TDSEL;

    }GPIO_CFG0_REGISTER_T;

     

    struct {

        GPIO_DRV_REGISTER_T GPIO_DRV;  < ----- here is driving

        GPIO_REGISTER_T GPIO_G;

        GPIO_REGISTER_T GPIO_IES;

        GPIO_REGISTER_T GPIO_PD;

        GPIO_REGISTER_T GPIO_PUPD;

        GPIO_REGISTER_T GPIO_PU;

        GPIO_REGISTER_T GPIO_R0;

        GPIO_REGISTER_T GPIO_R1;

        GPIO_RDSEL_REGISTER_T GPIO_RDSEL;

        GPIO_REGISTER_T GPIO_SMT;

        GPIO_REGISTER_T GPIO_SR;

        GPIO_TDSEL_REGISTER_T GPIO_TDSEL;

    }GPIO_CFG1_REGISTER_T;

     

    struct {

        GPIO_REGISTER_2_T GPIO_DIR;

        GPIO_REGISTER_2_T GPIO_DOUT;

        GPIO_DIN_REGISTER_T GPIO_DIN;

        GPIO_MODE_REGISTER_T GPIO_MODE;

    }GPIO_BASE_REGISTER_T;

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  • wizio
    0 wizio over 6 years ago

    This is "default" Mediatek GPIO structs for cortex-M4 ...

    Try find offsets https://github.com/Azure/azure-sphere-samples/blob/master/Samples/GPIO/GPIO_RTApp_MT3620_BareMetal/mt3620-gpio.c#L19

     

     

    struct {

        volatile uint32_t RW[2];

        uint32_t RESERVED[4];

    }GPIO_DRV_REGISTER_T;

     

    struct {

       

        GPIO_REGISTER_T GPIO_IES;

        GPIO_REGISTER_T GPIO_PD;

        GPIO_REGISTER_T GPIO_PUPD;

        GPIO_REGISTER_T GPIO_PU;

        GPIO_REGISTER_T GPIO_R0;

        GPIO_REGISTER_T GPIO_R1;

        GPIO_RDSEL_REGISTER_T GPIO_RDSEL;

        GPIO_REGISTER_T GPIO_SMT;

        GPIO_REGISTER_T GPIO_SR;

        GPIO_TDSEL_REGISTER_T GPIO_TDSEL;

    }GPIO_CFG0_REGISTER_T;

     

    struct {

        GPIO_DRV_REGISTER_T GPIO_DRV;  < ----- here is driving

        GPIO_REGISTER_T GPIO_G;

        GPIO_REGISTER_T GPIO_IES;

        GPIO_REGISTER_T GPIO_PD;

        GPIO_REGISTER_T GPIO_PUPD;

        GPIO_REGISTER_T GPIO_PU;

        GPIO_REGISTER_T GPIO_R0;

        GPIO_REGISTER_T GPIO_R1;

        GPIO_RDSEL_REGISTER_T GPIO_RDSEL;

        GPIO_REGISTER_T GPIO_SMT;

        GPIO_REGISTER_T GPIO_SR;

        GPIO_TDSEL_REGISTER_T GPIO_TDSEL;

    }GPIO_CFG1_REGISTER_T;

     

    struct {

        GPIO_REGISTER_2_T GPIO_DIR;

        GPIO_REGISTER_2_T GPIO_DOUT;

        GPIO_DIN_REGISTER_T GPIO_DIN;

        GPIO_MODE_REGISTER_T GPIO_MODE;

    }GPIO_BASE_REGISTER_T;

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