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Parallella $99 board now open hardware on Github

morgaine

It's probably spreading everywhere like wildfire, but I just read on Olimex's blog that Adapteva's Parallella kickstarter board now has almost all of its development materials on Github in Parallela and Adapteva repos, and is officially being launched as open hardware.

 

The 16-core board is priced at US$99 and its host ARM is a dual-core Cortex-A9 (Xilinx Zynq 7010 or 7020).  It comes with 1GB DDR3, host and client USB, native gigabit Ethernet and HDMI, so at that price this would be a fairly interesting board even without its 16-core Epiphany coprocessor.  (There's a 64-core version planned too.)  For more details see the Parallella Reference Manual.

 

This has all the makings of a pretty fun board.  I hope Element 14 has one eye open in that direction. image

 

Morgaine.

 

 

PS. Note the 4 x Parallella Expansion Connectors (PEC) on the bottom of the board, illustrated on page 19 of the manual and documented on page 26.  They look very flexible for projects, providing access to both Zynq and Epiphany resources.

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  • it is perhaps worth noting that although the Parallella board design is open,

    the 16-core Epiphany coprocessor's design apparently is not.

     

    The Olimex blog says:

     

    Now everyone can look and learn how this supercomputer was made, the schematic, the board files, the Verilog sources for the FPGA on board all is open and you can view.

     

     

    but I believe the FPGA they reference refers to the dual-core cpu chip, not the 16-core coprocessor.

  • in reply to Former Member

    coder27 wrote:

     

    it is perhaps worth noting that although the Parallella board design is open,

    the 16-core Epiphany coprocessor's design apparently is not.

     

    Do you mean that something on the Epiphany device is not documented?  I haven't looked into it at that level.

     

    The HDL for the Zynq's FPGA which interfaces to the Epiphany and HDMI transceiver appears to be available on Github, although I have no idea if what's available is only partial.  I get the feeling from Andreas Olofsson's comments that their intention is that everything relevant be open sourced or open documented.

     

    I don't expect design files for the Epiphany device to be provided, since they're not needed to replicate the board.  End users who develop new versions of the board wouldn't manufacture the Epiphany chip, they would buy them in.  It's no different to buying in an AM335x SoC to make your own open hardware BBB-alike.

  • in reply to morgaine

    Do you mean that something on the Epiphany device is not documented?...

    The HDL for the Zynq's FPGA which interfaces to the Epiphany and HDMI transceiver appears to be available on Github

     

    Right.  The HDL is for the Zynq FPGA, not the Epiphany 16-core device where

    most of the magic happens. 

     

     

    It's no different to buying in an AM335x SoC to make your own BBB-alike.

     

     

    Right.  But the blog wasn't very clear about what was open and what wasn't.

  • in reply to Former Member

    coder27 wrote:

     

    Right.  But the blog wasn't very clear about what was open and what wasn't.

     

    I'm not really sure which area harbours doubt in your mind.  There are some issues with Xilinx, but:

     

    Olimex blogged:

     

    Now everyone can look and learn how this supercomputer was made, the schematic, the board files, the Verilog sources for the FPGA on board all is open and you can view.

     

    All that seems to be true, subject to checking that the data is complete.  The only FPGA on the board is in the Xilinx Zynq, and they're providing the relevant HDL for that.  I haven't yet seen the low level details of how the Epiphany is programmed and accessed, but if that's fully documented and there are no binary blobs then it does seem that they've produced a genuine open hardware board.

     

    Of course, there's the old Xilinx issue of requiring their proprietary design software if you're going to reprogram the Zynq's FPGA differently, but it shouldn't be needed just for squirting in the bitstream to set the FPGA up for the Parallella board.  And it won't be needed for running Linux on the board.

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  • in reply to Former Member

    coder27 wrote:

     

    Right.  But the blog wasn't very clear about what was open and what wasn't.

     

    I'm not really sure which area harbours doubt in your mind.  There are some issues with Xilinx, but:

     

    Olimex blogged:

     

    Now everyone can look and learn how this supercomputer was made, the schematic, the board files, the Verilog sources for the FPGA on board all is open and you can view.

     

    All that seems to be true, subject to checking that the data is complete.  The only FPGA on the board is in the Xilinx Zynq, and they're providing the relevant HDL for that.  I haven't yet seen the low level details of how the Epiphany is programmed and accessed, but if that's fully documented and there are no binary blobs then it does seem that they've produced a genuine open hardware board.

     

    Of course, there's the old Xilinx issue of requiring their proprietary design software if you're going to reprogram the Zynq's FPGA differently, but it shouldn't be needed just for squirting in the bitstream to set the FPGA up for the Parallella board.  And it won't be needed for running Linux on the board.

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  • in reply to morgaine

    The only FPGA on the board is in the Xilinx Zynq,

     

    Yes, if you happen to know that the Epiphany isn't an FPGA, then you can deduce

    that when they say: "Now everyone can look and learn how this supercomputer was made"

    that they aren't referring to the 16-core Epiphany chip.

  • in reply to Former Member

    Ah, fair enough.

     

    Well Epiphany  probably started out being protoyped on FPGAs, maybe just a few cores at a time, but it would be far too slow and also very costly to deliver the end product in FPGAs.  It's not a reconfigurable computer after all, which sometimes do merit end delivery on FPGAs in order to allow their internal structure to be altered.

     

    The Epiphany is a fixed array of special cores, and while I don't know in what semiconductor process it has been manufactured (but it's a fairly modern 28nm one), it's a good bet that it'll be the fastest and cheapest that Adapteva can afford for a device that will be used on a $99 board, which is bound to mean that it's an ASIC like all normal SoCs.