Altera: DK-DEV-3C120N Cyclone III FPGA Development Kit

Overview

Altera's DK-DEV-3C120NDK-DEV-3C120N Cyclone III FPGA Development Kit combines the largest density low-cost, low-power FPGA available with a robust set of memories and user interfaces. The kit dramatically reduces the design and verification portion of your project, whether it’s for automotive, consumer, wireless communications, video processing or another high-volume, cost-sensitive application.The low-cost Cyclone III FPGA family, the industry’s first family of low-cost, 60-nm devices offers an unprecedented combination of low power, high functionality, and low cost. Cyclone III devices are ideal to complement or replace ASSPs or ASICs.

The Cyclone III development board provides a hardware platform for developing and prototyping low-power, high-volume, and feature-rich designs as well as to demonstrate the Cyclone III device’s on-chip memory, embedded multipliers, and the Nios II embedded processor. Built on TSMC’s 65-nm low-power process technology, Cyclone III devices are designed to provide low static and dynamic power consumption.

Additionally, with the support of the Quartus II software’s PowerPlay technology, designs are automatically optimized for power consumption. Therefore, the Cyclone III development board provides a power-optimized, integrated solution for memory-intensive, high-volume applications. With up to 4 Mbits of embedded memory and 288 embedded 18-bit × 18-bit multipliers, the Cyclone III device supplies internal memory while also providing external support for high-speed, low-latency memory access via dual-channel DDR SDRAM and low-power SRAM.

If you are an experienced FPGA designer checking out the Cyclone III architecture, you'll love building systems leveraging the 50 percent (on average) faster performance Cyclone III FPGAs offer over the competition.

Key Applications: Automotive, Consumer, Display, Industrial, Military, Video and image processing and Wireless.

Development Tools

Software Development Tools:

Hardware Development Tools:

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Technical Documents

Learning Center

Design Elements

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Video

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Kit Features

The board features the following major component blocks:

• Embedded memory for high-bandwidth applications
• Expandable through two Altera High-Speed Mezzanine Connectors (HSMCs)
• Supports high-speed external memory interfaces including dual-channel DDR SDRAM and low-power SRAM
• Four user push-button switches
• Power consumption display
• 780-pin Altera Cyclone IIIEP3C120 EP3C120 FPGA in a BGA package
  • 119K logic elements (LEs)
  • 3,888 Kbits of memory
  • 288 18 × 18 multiplier blocks
  • Four phase locked loops (PLLs)
  • 20 global clock networks
  • 531 user I/Os
  • 1.2-V core power
• 256-pin Altera MAX IIEPM2210GEPM2210G CPLD in a FineLine Ball Grid Array (FBGA) package
  • 1.8-V core power
• On-board memory
  • 256-MB dual-channel DDR2 SDRAM
  • 8-MB SRAM
  • 64-MB flash memory
• FPGA configuration circuitry
  • MAX II CPLD and flash passive serial configuration
  • On-board USB-Blaster circuitry using the Quartus II Programmer
• On-board clocking circuitry
  • Two clock oscillators to support Cyclone III device user logic
    • 50 MHz
    • 125 MHz
  • 80 I/O, 6 clocks, SMBus, and JTAG
  • SMA connector for external clock input and output
• General user and configuration interfaces
  • LEDs/displays:
    • Eight user LEDs
    • One transmit/receive LED (TX/RX) per HSMC interface
    • One configuration done LED
    • Ethernet LEDs
    • User 7-segment display
    • Power consumption display
  • Memory activity LEDs:
    • SRAM
    • FLASH
    • DDR2 Top
    • DDR2 Bottom
  • Push-buttons:
    • One user reset push-button (CPU reset)
    • Four general user push-buttons
    • One system reset push-button (user configuration)
    • One factory push-button switch (factory configuration)
  • DIP switches:
    • One MAX control DIP switch
    • One JTAG control switch
    • Eight user DIP switches
    • Speaker header
• Displays
  • 128 × 64 graphics LCD
  • 16 × 2 line character LCD
• Power supply
  • 14 V – 20 V DC input
  • On-board power measurement circuitry
  • Up to 19.8 W per HSMC interface
• Mechanical
  • 6” × 8” board
  • Bench-top design
• The Cyclone III development board provides the following advantages:
  • Unique combination of low-cost, low-power Cyclone III FPGA that supports high-volume, memory-intensive designs
  • Highest multiplier-to-logic ratio FPGA in the industry
  • Lowest cost, density- and power-optimized FPGA
  • Quartus II development software’s power optimization tools

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Kit Contents

The Altera DK-DEV-3C120NDK-DEV-3C120N Cyclone III FPGA Development Kit supplied with below contents:

• Cyclone III FPGA Development Kit, CD-ROM (download all CD contents via FTP)
  • Design examples for the Cyclone III FPGA development board
  • Complete documentation
    • User guide
    • Reference manual
    • Board schematic and layout
    • Bill of materials (BOM)
    • Product and partner information
• Altera Complete Design Suite (download from Altera Download Center)
  • Quartus II design software
    • Subscription Edition (optional feature, available for purchase)
    • Web Edition (no charge, Windows only)
  • ModelSim-Altera software
    • Altera Edition (optional feature, available for purchase)
    • Web Edition (no charge, Windows only)
  • MegaCore IP Library - OpenCore Plus evaluation
    • Includes Nios II processor (evaluation license)
  • Nios II Embedded Design Suite, Evaluation Edition (no charge)
  • DSP Builder (optional feature and available for purchase)
  • Video demos of Quartus II software and Nios II embedded processor

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