device with same signal legs, how?

On 7/7/2010 4:50 AM, Arthur Elsenaar wrote:

Hi,

>

I have a part, a FET in a SOT223-5EV-VREGSOT223-5EV-VREG package, it has the three regular DSG

legs + a large drain for cooling. The drain therefor has two pads, how

can I connect them so they carry the same signal?

>

Tried the connection function in the device editor, but it won't allow

me to connect to two pins to the same signal.

>

Any ideas?

>

Thanks,

>

Arthur

>

name one pad drain@1 and the other drain@2, you will get two schematic

pins that must be connected in the schematic. the part of the name after

the @ will not be shown. in EAGLE, at least for now, each pad must have

a pin. this is one of the annoyances we have for now...

artelse wrote on Wed, 07 July 2010 07:50

I have a part, a FET in a SOT223-5EV-VREGSOT223-5EV-VREG package, it has the three regular DSG

 

legs + a large drain for cooling. The drain therefor has two pads, how

 

can I connect them so they carry the same signal?

You can short the two pads together with a polygon, or make only one pad

and simulate the other yourself and connect them, but either way you will

get massive DRC errors.  There is no good answer for this in Eagle

unfortunately.

--

Web access to CadSoft support forums at www.eaglecentral.ca.  Where the CadSoft EAGLE community meets.

artelse wrote

I have a part, a FET in a SOT223-5EV-VREGSOT223-5EV-VREG package, it has the three regular DSG

legs + a large drain for cooling. The drain therefor has two pads, how

can I connect them so they carry the same signal?

>

"Olin Lathrop"  replied

You can short the two pads together with a polygon, or make only one pad

and simulate the other yourself and connect them, but either way you will

get massive DRC errors.  There is no good answer for this in Eagle

unfortunately.

Not quite true

You can add a connected polygon copper pad for the tab without DRC errors.

For a SOT-223 package with only 3 pads.

Add the Tab pad in the board editor using the polygon tool.

Determine the name of the drain net and name the polygon the same.

Route from the drain pad to the polygon outline  .

Ratsnest to fill polygon and recalculate airwires

Warren

On 2010-07-09 08:49:28 +0200, Warren Brayshaw said:

artelse wrote

>>> I have a part, a FET in a SOT223-5EV-VREGSOT223-5EV-VREG package, it has the three regular DSG

>>> legs + a large drain for cooling. The drain therefor has two pads, how

>>> can I connect them so they carry the same signal?

>>

"Olin Lathrop"  replied

>> You can short the two pads together with a polygon, or make only one pad

>> and simulate the other yourself and connect them, but either way you will

>> get massive DRC errors.  There is no good answer for this in Eagle

>> unfortunately.

 

Not quite true

You can add a connected polygon copper pad for the tab without DRC errors.

For a SOT-223 package with only 3 pads.

Add the Tab pad in the board editor using the polygon tool.

Determine the name of the drain net and name the polygon the same.

Route from the drain pad to the polygon outline  .

Ratsnest to fill polygon and recalculate airwires

 

Warren

Thanks for the response, I thought I missed something, but it's just

not as easy as one might expect. The @ rule and the polygon trick of

Warren will solve my problem, although not in the most elegant way.

Arthur

On 7/9/2010 6:12 AM, Arthur Elsenaar wrote:

On 2010-07-09 08:49:28 +0200, Warren Brayshaw said:

>

>> artelse wrote

>>>> I have a part, a FET in a SOT223-5EV-VREGSOT223-5EV-VREG package, it has the three regular DSG

>>>> legs + a large drain for cooling. The drain therefor has two pads, how

>>>> can I connect them so they carry the same signal?

>>>

>> "Olin Lathrop" replied

>>> You can short the two pads together with a polygon, or make only one pad

>>> and simulate the other yourself and connect them, but either way you

>>> will

>>> get massive DRC errors. There is no good answer for this in Eagle

>>> unfortunately.

>>

>> Not quite true

>> You can add a connected polygon copper pad for the tab without DRC

>> errors.

>> For a SOT-223 package with only 3 pads.

>> Add the Tab pad in the board editor using the polygon tool.

>> Determine the name of the drain net and name the polygon the same.

>> Route from the drain pad to the polygon outline .

>> Ratsnest to fill polygon and recalculate airwires

>>

>> Warren

>

Thanks for the response, I thought I missed something, but it's just not

as easy as one might expect. The @ rule and the polygon trick of Warren

will solve my problem, although not in the most elegant way.

>

Arthur

>

yup. it's a big problem with EAGLE. I often do the same as Warren

suggests, and just leave that Heatsink out of the part's footprint.

lately, I've been adding a Heatsink pin to the part and just connecting

it up. It looked ugly in the schem at first, but I got used to it.

Gary Gofstein schrieb:

yup. it's a big problem with EAGLE. I often do the same as Warren

suggests, and just leave that Heatsink out of the part's footprint.

lately, I've been adding a Heatsink pin to the part and just connecting

it up. It looked ugly in the schem at first, but I got used to it.

JFYI: For devices with multipe pads per node, I always use (ugly)

symbols that represent the pad count 1:1. It's better to have an

explicitly correct schematic and board than to have a nice looking

schematic only, IMHO.

The downside of this method is that you need multiple devices for

different packages of basically the same part (if they differ in pad

count). So far, we'll have to live with that. Many suggestions have been

made about how to eventually solve this, but we are still hoping for

something to get real...

For thermal pads, I simply put the stop and cream masks in the package

definition, and use a polygon in the board - which is there for heat

spreading, anyway. So in this case, the connection at the thermal pad

doesn't show up in the schematic - this doesn't matter to me since it

normally is also connected elsewhere to the device, or obvious...

Tilmann

warrenbrayshaw wrote on Fri, 09 July 2010 02:49

Quote:

You can short the two pads together with a polygon, or make only

one pad and simulate the other yourself and connect them, but either

way you will get massive DRC errors.  There is no good answer for this

in Eagle unfortunately.

 

Not quite true You can add a connected polygon copper pad for the tab

without DRC errors.  For a SOT-223 package with only 3 pads.  Add the Tab

pad in the board editor using the polygon tool.

But now you're manually messing with it in the board editor, which you'd

have to do seperately each time you use the device.  I guess there is still

no good answer in Eagle.

If you know of a way to pre-define devices like this that then don't cause

DRC errors, I'd really like to know about it.  Right now I live with the

DRC errors, which makes DRC rather less useful than it could be.  Not a

good answer either.

--

Web access to CadSoft support forums at www.eaglecentral.ca.  Where the CadSoft EAGLE community meets.