How to you JOIN  two grounds, i.e VSS   & GND signals?

On 12/04/2011 10:22 PM, davem wrote:

Hi,

 

 

How to you JOIN the two ground VSS & GND signals? without having one net

name?

 

Thanks Dave M

Dave,

The easiest way it to create a library part called "connector" or

"short".  Such a device has two SMD pads that overlap, and a symbol with

two pins that just connect to each other.

You'll get a DRC error with the pads, and maybe even with traces that

approach it, but they're easy enough to approve.

I've attached a shorts library.  I believe Olin originally made this,

but I wouldn't swear to it.  If you use the SMD package, be sure to edit

the library to get rid of the solder paste layer and optionally the

solder mask layer.  You can do this by editing each SMD pad and turn the

Cream and Mask flags off.

Enjoy,

    - Chuck

On 12/05/2011 08:38 AM, Chuck Huber wrote:

On 12/04/2011 10:22 PM, davem wrote:

>> Hi,

>>

>>

>> How to you JOIN the two ground VSS & GND signals? without having one net

>> name?

The shorts devices have come in handy when you need to keep an analog

ground separate from a digital ground.  Since they're treated as

separate nets in Eagle, one can place the short close to your star

ground point.

    - Chuck

Hi Chuck,

Thanks for the reply,

I forgot to mention I need to "JOIN" these two polygon "grounds" with

VIA's. Many of them, which also act as a heat sink.

My grounds Connect at a voltage regulators ground plan ( as suggested by

the manufacturers specifications.

I have done ALL my design/layout work, except for the "Joins"

One ground is the top layer, the other is the bottom,

I checked out the Shorting links, I have seen those before, but that wont

work for my design.

The only thing I can think off is the RENAME my "analog ground" to "VSS",

and then my vias will work, but that make my schematics incorrect, and is

this was done before layout started I would of had a great big mess.!

I believe this is a short coming of eaglecad, and a fix for this problem

needs to be addressed, has this been discussed before?

We need a "JOINING VIA" or even someway of joining to different nets.

Thanks

Dave M

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On 12/5/2011 5:10 PM, davem wrote:

Hi Chuck,

 

Thanks for the reply,

 

I forgot to mention I need to "JOIN" these two polygon "grounds" with

VIA's. Many of them, which also act as a heat sink.

 

My grounds Connect at a voltage regulators ground plan ( as suggested by

the manufacturers specifications.

 

I have done ALL my design/layout work, except for the "Joins"

 

One ground is the top layer, the other is the bottom,

 

I checked out the Shorting links, I have seen those before, but that wont

work for my design.

 

>

The only thing I can think off is the RENAME my "analog ground" to "VSS",

and then my vias will work, but that make my schematics incorrect, and is

this was done before layout started I would of had a great big mess.!

 

I believe this is a short coming of eaglecad, and a fix for this problem

needs to be addressed, has this been discussed before?

 

We need a "JOINING VIA" or even someway of joining to different nets.

 

Thanks

 

Dave M

 

>

Hi Dave,

Another solution is to just overlap the polygons at a single point, it

will generate a single DRC overlap error but will get you the result you

want. This will work as long as both polygons have the same rank, if

they have different ranks then one will subtract from the other which is

not what you intend in this case. This is probably the best solution for

you particular scenario, sometimes you have to violate DRC to get what

you want done.

Best Regards,

Jorge Garcia

Cadsoft Support

davem wrote:

Hi Chuck,

 

Thanks for the reply,

 

I forgot to mention I need to "JOIN" these two polygon "grounds" with

VIA's. Many of them, which also act as a heat sink.

 

My grounds Connect at a voltage regulators ground plan ( as suggested

by the manufacturers specifications.

 

I have done ALL my design/layout work, except for the "Joins"

 

One ground is the top layer, the other is the bottom,

 

I checked out the Shorting links, I have seen those before, but that

wont work for my design.

 

There is another way that my be of interest.

Consider the following:

Instead of a VIA  place a HOLE.

The next consideration is that a polygon will keep away from the edge of

that hole by the mount set in the DRC (Keeps away from all in the dimension

layer)

Now define a user layer and using that place a patch (rect circle etc) over

the hole. That layer needs to be included when making the top and bottom

gerbers.

This would result in a plated through hole at most board houses.

You could create the above as a 'fake via' package that you add to the board

in place of a via. As there is no device, you can do this while working with

a consistant schem/brd pair.

This keeps the hole and patch locked together so that they move together.

The above technique is probably best limited to 2 layer boards and you do

have to remember the extra layer to include in the gerber.

HTH

Warren

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news.cadsoft.de

HI Warren,

I SOLVED IT!

You can't do this with some kind of via or custom part, I tried, but the

hole wants to create its own mask, no matter how you set it.

How I fixed it,

I think it was suggested somewhere before, but I split the ground plane in

two, then , for where my vias go, I name that ground plane to match "VSS",

its was "GND" before, Now I have a small polygon overlap, for both the GND

& VSS ground planes, they will join as far as copper is concerned, and it

does show up an error in the DRC, but who cares!

thanks for everyone's help.

I still think cadsoft need to make this easier for us.

dave M

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Web access to CadSoft support forums at www.eaglecentral.ca.  Where the CadSoft EAGLE community meets.

HI George, 

Your idea worked, and would you believe I have done this before! but I

could not remember!

thanks mate!

--

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To solve this problem with VSS and GND.  Eagle has two library names "supply1" and "supply2".  If you choose the library supply1 and choose the GND it will not connect to VSS on the schematic editor.  You must choose the library "supply2" then select GND, this will cause the VSS and GND ground to connect always.  When you select the "supply2" library there is note:

FYI try using the supply2 library instead of supply1

Supply Symbols

GND, VCC, 0V, +5V, -5V, etc.

Please keep in mind, that these devices are necessary for the automatic wiring of the supply signals.

The pin name defined in the symbol is identical to the net which is to be wired automatically.

In this library the device names are the same as the pin names of the symbols, therefore the correct signal names appear next to the supply symbols in the schematic.

Hope this will help.

Billy

On 21/08/14 21:21, BILLY GATES JR wrote:

Eagle has two library names

"supply1" and "supply2".  If you choose the library supply1 and choose

the GND it will not connect to VSS on the schematic editor.

These statements are correct. Unfortunately the rest of the post wasn't.

The only difference between the "supply1" and "supply2" libraries is

stylistic.

GND and VSS are different nets. This is fundamental and important and

should never be forgotten... because on a certain subset of circuits it

is essential that they are not connected together. So the tool would

have no business making any hidden assumptions of them being the same.

They aren't.

If your schematic needs VSS and GND to be common, then you need to

explicitly connect them.

Hi,

it's is the old problem of  'Kelvin connection or different ground connection' (see this suggestion). There is no way of having a clean design (I mean no DRC error) in this situations, unless one day there is a feature to ask Eagle to no report some errors in a particular area (with a polygon in a 'no_DRC' layer for example...). Kelvin connection are not really frequent, but separate plane is quite common...

Hopefully, we can 'approve' DRC errors/warning....

Guillaume Barrey