via's, polygons and cutouts

John Warren schrieb:

New to eagle along with the fact that the last time I ever laid out a board

we were still using tape and pads. :d   So far things are going well but I

have a few questions.

First of all: welcome.

1. Via's with SMD parts. when connecting two SMD parts on direct opposite

sides of a board and who's pads line up, in this case two 5050 LED's, can

you place a via, or the plate through hold, on the pad? I hate to loose the

lanes just to place a full via pad.

If you put vias inside of SMD pads, they will drain the solder paste

during reflow process unless you let the boardhouse "plug" (fill) them,

which is more expensive. It's good practice to keep vias separate from

pads (so that some solder stop mask is inbetween).

If you're soldering manually, you might accept vias in pads, however.

2. Polygons for power and ground on a two sided board. Can I use the

polygon to interconnect the power and grounds to components? I'd like to

know keep putting in traces and just let the polygon connect them.

Yes, you can use polygons to also provide connections - however take

care that a) you reach all desired pads, and b) you always know where

the current paths are (think of EMV). It's always good to keep the

complete design in mind during the whole routing process...

3. Cutouts. I have a large hole that need to be cut in the middle of the

board so part of a component can go though it. What's the best way to do

this?

Simply draw the desired outline information in the dimension layer. I

always recommend to draw it also in the milling layer, using really thin

wires - that's for providing the contour data to the board house without

the implicit circles of illegal width that are generated in the

dimension layer for holes.

4. Can eagle panelize or is that best left to the vendor?

Yes, it can, and I always do it myself and provide exact and complete

data to the board house. Of course they can also panelize the boards for

you. Talk to them for their preference and pricing...

Tilmann

Tilmann Reh wrote on Thu, 08 December 2011 12:53

John Warren schrieb:

 

First of all: welcome.

 

Thanks

 

If you put vias inside of SMD pads, they will drain the solder paste

during reflow process unless you let the boardhouse "plug" (fill)

them,

which is more expensive. It's good practice to keep vias separate from

pads (so that some solder stop mask is in-between).

 

If you're soldering manually, you might accept vias in pads, however.

 

For now I'll just push the via up tight to the pad and accept the

clearance error. I must say that working with SMDs is really different.

 

I'm used to running traces between pads but that's not an option with

TSSOP and the like as the pads aren't much wider than the traces and the

spacing is about the same as a trace.

 

It's going to be fun hand building my prototypes. :d  I may even have

to purchase a new solder station.

 

Do you happen to have a link to a good tutorial on building boards with

SMD so I can brush up?

 

Yes, you can use polygons to also provide connections - however take

care that a) you reach all desired pads, and b) you always know

where

the current paths are (think of EMV). It's always good to keep the

complete design in mind during the whole routing process...

 

Likely best to just connect then up then add the poly afterwards.

 

Simply draw the desired outline information in the dimension layer. I

always recommend to draw it also in the milling layer, using really

thin

wires - that's for providing the contour data to the board house

without

the implicit circles of illegal width that are generated in the

dimension layer for holes.

 

I'll give that a try.

 

When you have a polygon on both sides of the board tied to the same

signal name, i.e., GND, is it more acceptable to just drop a hole to

connect them rather than a VIA?

 

Yes, it can, and I always do it myself and provide exact and complete

data to the board house. Of course they can also panelize the boards

for

you. Talk to them for their preference and pricing...

 

Likely best if the board how does it for now as it wouldn't take many

repeats to go a larger board than my version allows. I'll just have make

sure the repeat information get back to me for the pick and place machine

to use.

 

Tilmann

Again thanks

--

Web access to CadSoft support forums at www.eaglecentral.ca.  Where the CadSoft EAGLE community meets.

Tilmann Reh wrote on Thu, 08 December 2011 12:53

John Warren schrieb:

 

First of all: welcome.

 

Thanks

 

If you put vias inside of SMD pads, they will drain the solder paste

during reflow process unless you let the boardhouse "plug" (fill)

them,

which is more expensive. It's good practice to keep vias separate from

pads (so that some solder stop mask is in-between).

 

If you're soldering manually, you might accept vias in pads, however.

 

For now I'll just push the via up tight to the pad and accept the

clearance error. I must say that working with SMDs is really different.

 

I'm used to running traces between pads but that's not an option with

TSSOP and the like as the pads aren't much wider than the traces and the

spacing is about the same as a trace.

 

It's going to be fun hand building my prototypes. :d  I may even have

to purchase a new solder station.

 

Do you happen to have a link to a good tutorial on building boards with

SMD so I can brush up?

 

Yes, you can use polygons to also provide connections - however take

care that a) you reach all desired pads, and b) you always know

where

the current paths are (think of EMV). It's always good to keep the

complete design in mind during the whole routing process...

 

Likely best to just connect then up then add the poly afterwards.

 

Simply draw the desired outline information in the dimension layer. I

always recommend to draw it also in the milling layer, using really

thin

wires - that's for providing the contour data to the board house

without

the implicit circles of illegal width that are generated in the

dimension layer for holes.

 

I'll give that a try.

 

When you have a polygon on both sides of the board tied to the same

signal name, i.e., GND, is it more acceptable to just drop a hole to

connect them rather than a VIA?

 

Yes, it can, and I always do it myself and provide exact and complete

data to the board house. Of course they can also panelize the boards

for

you. Talk to them for their preference and pricing...

 

Likely best if the board how does it for now as it wouldn't take many

repeats to go a larger board than my version allows. I'll just have make

sure the repeat information get back to me for the pick and place machine

to use.

 

Tilmann

Again thanks

--

Web access to CadSoft support forums at www.eaglecentral.ca.  Where the CadSoft EAGLE community meets.

Hello John,

please take care of correct quoting - your answers can't be

distinguished from my previous post, which makes it rather hard to read

and understand. (I'm fixing the quote levels below.)

>> If you put vias inside of SMD pads, they will drain the solder

>> paste during reflow process unless you let the boardhouse "plug"

>> (fill) them, which is more expensive. It's good practice to keep

>> vias separate from pads (so that some solder stop mask is

>> in-between).

>>

>> If you're soldering manually, you might accept vias in pads, however.

 

For now I'll just push the via up tight to the pad and accept the

clearance error. I must say that working with SMDs is really different.

Yes, if you didn't use SMD before, you will have to get used to it...

It's a little bit more like routing a single sided board, making good

placement really essential. Take the time needed to properly place the

parts.

If you know you're going to use ground polygons, disable the display of

ground airwires ("ratsnest ! gnd") at first. However, take care to leave

enough room for the gnd vias that are needed later...

I'm used to running traces between pads but that's not an option with

TSSOP and the like as the pads aren't much wider than the traces and the

spacing is about the same as a trace.

With SMD, normally no traces are run between pads at a pitch less than

1.27 mm (50 mil - standard SO). This makes placement even more essential.

It's going to be fun hand building my prototypes. :d  I may even have

to purchase a new solder station.

 

Do you happen to have a link to a good tutorial on building boards with

SMD so I can brush up?

I don't know which soldering station you currently have, but provided

it's a good one with decent temperature regulation, you might at first

simply try a suitable tip.

For soldering SMD ICs, even fine pitch, here is a very good tutorial

video: <http://www.youtube.com/watch?v=wQXhny3R7lk>

You simply don't need to solder all the pads separately, in case you had

feared that.

>> Yes, you can use polygons to also provide connections - however

>> take care that a) you reach all desired pads, and b) you always

>> know where the current paths are (think of EMV). It's always good

>> to keep the complete design in mind during the whole routing

>> process...

 

Likely best to just connect then up then add the poly afterwards.

That heavily depends on the circuit and placement... If you know that

there will be a gnd polygon covering about the whole solder side (except

for say a few short slots), you can simply hide the gnd airwires and

route the signals. Afterwards, enable the gnd airwires, draw your

polygon, and connect the gnd (with vias to the polygon wherever needed

and/or possible).

For using polygons and signals on both copper layers, strategy is

different. Take care to finally get a good gnd "mesh" covering the whole

board, by connecting the two polygons more or less regularly with vias.

(Hint: if you just drop vias in there, they will get their own signal

names and thus not be connected to the polygons. They need to have the

same signal name as the polygon, you can "rename" them with NAME. Or,

much easier: simply enter "via gnd" and then drop them where needed...)

When you have a polygon on both sides of the board tied to the same

signal name, i.e., GND, is it more acceptable to just drop a hole to

connect them rather than a VIA?

No, you need to use VIAs. HOLEs are electrically insulated and just for

mechanical purposes (mounting of larger parts, or the board itself).

Observe the difference after doing a ratsnest (polygon recalculation).

>> Yes, it can, and I always do it myself and provide exact and complete

>> data to the board house. Of course they can also panelize the boards

>> for

>> you. Talk to them for their preference and pricing...

 

Likely best if the board how does it for now as it wouldn't take many

repeats to go a larger board than my version allows. I'll just have make

sure the repeat information get back to me for the pick and place machine

to use.

P&P machines normally support panelizing by themselves. You just need

the P&P data for a single board, then add information about board count

and offsets in the panel.

Tilmann