Wot, still no package land pattern vias?

On 9/18/2014 10:58 PM, Ryan Pettigrew wrote:

The one thing I expected to be fixed in v7 was vias in land patterns.

Nope, still AWOL, in spite of a glaring need for thermal transfer to

ground via the center pad on some parts. What gives? When is this

coming?

 

--

To view any images and attachments in this post, visit:

http://www.element14.com/community/message/126808

 

Hi Ryan,

This is already possible. Here's what you would do:

In the package:

1. Place the thermal transfer through-hole pads(pads and vias are

physically the same thing, the distinction we make in EAGLE is that pads

are always associated with components and go through the hole board,

vias are on the board and generally associated with transitions between

layers).

2. Draw polygons enclosing these pads on the Top, Bottom, tStop, bStop,

tCream, and bCream layers. My assumption here is that the thermal pad

shows up on both sides of the board, this isn't always the case but for

the sake of generality I've included them here.

3. In the device editor, assign all of those pads to the same pin of

your symbol, because they're within the boundaries of the polygon the

polygon is considered an extension of those pads.

That's pretty much all you have to do, and EAGLE will handle it without

errors. Section 8.14 of the EAGLE manual covers this in greater

detail.The Help pages for PAD and SMD provide more details

hth,

Jorge Garcia

CadSoft Guest wrote:

 

That's pretty much all you have to do, and EAGLE will handle it without

errors. Section 8.14 of the EAGLE manual covers this in greater

detail.The Help pages for PAD and SMD provide more details

Jorge, the problem is, you can't then assign it to the via layer, with all the other vias, where it belongs, and where it is convenient for the board assembler to find it, and know what it is, and what its purpose is supposed to be.

I reiterate; I am NOT interested in ways of working around this problem; I am interested in this problem being fixed, so no workaround is required. If I wanted help getting around this limitation in the software, I would have posted in the help forum, not here in the suggestion forum.

"Ryan Pettigrew"  skrev i nyhetsmeldingen:

841402075.181411429316209.JavaMail.jive@flmspu-csapp-02.premierfarnell.com

...

Jorge, the problem is, you can't then assign it to the via layer, with

all the other vias, where it belongs, and where it is convenient for the

board assembler to find it, and know what it is, and what its purpose is

supposed to be.

I do not see the need to differ those vias/pads from other vias/pads. Maybe

you can explain why they need to know? Full through vias and pads are

generally manufactured in the same process afaik.

The only valid argument I can see is that sometimes, when working with

blind/buried/micro-vias, you may want the heat transfer between controlled

layers, but doing this in a library editor is not straight forward. It could

be done with some "vitrual via" placement that needs to be placed manually

in the board design, and would cause a DRC error if not present.

"Ryan Pettigrew"  skrev i nyhetsmeldingen:

841402075.181411429316209.JavaMail.jive@flmspu-csapp-02.premierfarnell.com

...

Jorge, the problem is, you can't then assign it to the via layer, with

all the other vias, where it belongs, and where it is convenient for the

board assembler to find it, and know what it is, and what its purpose is

supposed to be.

I do not see the need to differ those vias/pads from other vias/pads. Maybe

you can explain why they need to know? Full through vias and pads are

generally manufactured in the same process afaik.

The only valid argument I can see is that sometimes, when working with

blind/buried/micro-vias, you may want the heat transfer between controlled

layers, but doing this in a library editor is not straight forward. It could

be done with some "vitrual via" placement that needs to be placed manually

in the board design, and would cause a DRC error if not present.

CadSoft Guest wrote:

 

The only valid argument I can see is that sometimes, when working with

blind/buried/micro-vias, you may want the heat transfer between controlled

layers, but doing this in a library editor is not straight forward. It could

be done with some "vitrual via" placement that needs to be placed manually

in the board design, and would cause a DRC error if not present.

You don't need to do it in the library. You should be able to change the layers of the via after the Land Pattern is placed in the design, so you can assign it to whichever ground or thermal planes you find convenient. The footprint via should assume to be for a 2 layer board, like a through hole, but with options for fill, over-plating on either or both sides, and tenting on either or both sides, with layer assignment to take place after the component is placed.