GND pads not connecting to GND polygon?

On 31.05.2016 13:11, Nuno Gomes wrote:

Hi, I'm trying to create a 4 layer PCB (TOP + POWER + GND + BOTTOM). I created 2 planes for the VBB and GNDBB using polygons.

My problem is the connection (let's say) beetween a resistor and the PAD of a component (let's call it X component). If try to connect the VBB connection of the resistor to a Via (and the via's name is VBB) the VBB PAD of the X component with appear like the pic below and the airwire that was connecting the resistor to the X component is gone!

But if I try to do the same with a resistor that is connected to a GND pad, the pad stays the same and the airwire is still there, which makes me wonder if the vias are even connecting to the GND plan.

 

The following are printscreens of the settings I'm currently using.

 

What am I doing wrong here?

Any help would be highly appreciated!

I'm not sure I understand the question.

Just make sure the through hole GND pad is surrounded by a polygon named

GND. A SMD resistor pad needs a via closeby to get to inner layer.

And remember to do ratsnest.

So, the GND pad on the X component? Like JP2 component on the last picture?

On 31.05.2016 13:29, Nuno Gomes wrote:

So, the GND pad on the X component? Like JP2 component on the last picture?

Are you referring to pin10 of JP2? (assuming pin1 is square) What

netname does that airwire belonging to? Pin1 of JP2 looks connected to

GND (assuming hatched grey layer is Layer 15 and polygon named GND)

You dont seem to have any other polygon on any layer under the connectors.

Pin1 on JP2 looks a bit funny too. Its appears connected to GND, but

still got a blue wire.

On 31.05.2016 13:35, Morten Leikvoll wrote:

On 31.05.2016 13:29, Nuno Gomes wrote:

So, the GND pad on the X component? Like JP2 component on the last

picture?

 

Are you referring to pin10 of JP2? (assuming pin1 is square) What

netname does that airwire belonging to? Pin1 of JP2 looks connected to

GND (assuming hatched grey layer is Layer 15 and polygon named GND)

 

You dont seem to have any other polygon on any layer under the connectors.

 

Pin1 on JP2 looks a bit funny too. Its appears connected to GND, but

still got a blue wire.

 

Ok, maybe the colors are a bit hard to separate.. I see some darker grey

below the hatched..  I suspect it has a different netname than the airwire.

Also, I think you need to do better routing on this. My initial reaction

is that this needs some proper engineering. Like proper decoupling,

proper heatsinking and proper widths for higher currents here and there.

Those lower chips looks like power hungry chips.

On 31.05.2016 13:35, Morten Leikvoll wrote:

On 31.05.2016 13:29, Nuno Gomes wrote:

So, the GND pad on the X component? Like JP2 component on the last

picture?

 

Are you referring to pin10 of JP2? (assuming pin1 is square) What

netname does that airwire belonging to? Pin1 of JP2 looks connected to

GND (assuming hatched grey layer is Layer 15 and polygon named GND)

 

You dont seem to have any other polygon on any layer under the connectors.

 

Pin1 on JP2 looks a bit funny too. Its appears connected to GND, but

still got a blue wire.

 

Ok, maybe the colors are a bit hard to separate.. I see some darker grey

below the hatched..  I suspect it has a different netname than the airwire.

Also, I think you need to do better routing on this. My initial reaction

is that this needs some proper engineering. Like proper decoupling,

proper heatsinking and proper widths for higher currents here and there.

Those lower chips looks like power hungry chips.