Is it possible to place a 'SMD' pad of a library package in an internal signal layer?

Question

I am designing a complex package that is going to be used repeatedly and requires the precision of a careful package layout.

I want to connect a schematic pin to a 'pad' on an internal signal layer of the package design. I realize that I am stretching the purpose for which a SMD pad should be used--I have no intent to surface mount anything to this pad--it will be sandwiched in an internal layer. It is simply used to tie a schematic net to a specific pad on an internal layer of the package.

Any ideas?

Thank you.

autodeskguest · Answer

On 26/08/2014 11:47 a.m., Chris Engberg wrote:

.....I am (attempting) to design a planar transformer in Eagle. Something
like this:
http://upload.wikimedia.org/wikipedia/commons/5/59/Planar_core_assembly_exploded.png

I want to do this as a package, as I will be reusing this part
repeatedly. A transformer coil (and the routing for the core) would not
be considered part of the final layout process—it is a device—it should
have a symbol and package, right?

My transformer is a single symbol in my schematic, with two 'pins' for
each coil. If it was an external transformer, I would just connect these
pins to external SMD-pads that would solder to the external device. But
in this case the coils are embedded in the board and should terminate at
pads to create the proper netlist and ERC from the schematic. (I realize
that any undefined copper for the coils in the package will result in
errors, but that easy enough to dismiss—redrawing without errors is
not).

For galvanic isolation, I do not want to tie high voltage schematic pins
from a secondary coil to any SMD-pad or through-hole that is exposed to
the outermost copper layers.

From my perspective, it would be easy if I could simply place a SMD-pad
on an internal layer. You already have control over pad mask, cream, and
layer (bottom or top). Why not an internal layer +no cream +no mask?

You cannot do it with a standard Eagle device for a number of reasons

the biggest being there are no vias in a package, only pads which drill

from top to bottom. Pad stacks are something asked for over the years

but still have not arrived.

I would do what you want the following way:

You make some of what you want as a package and the rest is created on

the board once. You then you create a script that describes the coils.

There may need to be a ULP to translate the relative coords of the coils

to the place in the future board.

The package gives the part an origin that the script will reference

Add the routing for the 'C'/'E' core holes

Add the tPlace (silk screen print)

Add outer SMD as needed to match with the pins of the schematic symbols

Add anything else that can be done when making the package.

Then on a new board:

Add the package

Draw the coils

Add via between the layers as required

Delete the package

Run the ULP that gathers up the details on the coil(wires)

That's it in a nutshell

You could practice with the ulps that eagle includes

spiral-coil.ulp

That gives you a coil with two vias to play with.

copy-layer-to-any-layer.ulp

That shows you the wires before it draws them. You could copy the

details of your layer using that.

Anyway thats the drift of a technique.

HTH

Warren

kikoun · Answer

Hi,

Why don't you draw your coil in a new board file. In this file you only have the coil.

Then, in your complete board design, you just use 'file>import>Eagle drawing' as many time as need to duplicate your coil design ?

Then you just rename the copper trace, with the corresponding net name. In schematic, you represent the coil, by drawing a coil symbol with the net wire it self !

It's easier than script and ulp....OK, it's only a workaround...

It would be nice to have 'internal pad feature' for package design, it would be useful in your case. But not only. It could be use of internal shield, or for some component that measure the current in a PCB trace (by hall-effect)...

Guillaume barrey.