Is it possible to place a 'SMD' pad of a library package in an internal signal layer?

I don't thing you can do it, but you can draw copper polygon, rectangle, or wire in all layer, including internal layer.

One solution would be to add a pad (TH type) inside that  area, maybe ?

Guillaume.

Guillame, thanks for your response. Let me give you some additional background on my task:

I am (attempting) to design a planar transformer in Eagle. Something like this: http://upload.wikimedia.org/wikipedia/commons/5/59/Planar_core_assembly_exploded.png

I want to do this as a package, as I will be reusing this part repeatedly. A transformer coil (and the routing for the core) would not be considered part of the final layout process—it is a device—it should have a symbol and package, right?

My transformer is a single symbol in my schematic, with two 'pins' for each coil. If it was an external transformer, I would just connect these pins to external SMD-pads that would solder to the external device. But in this case the coils are embedded in the board and should terminate at pads to create the proper netlist and ERC from the schematic. (I realize that any undefined copper for the coils in the package will result in errors, but that easy enough to dismiss—redrawing without errors is not).

For galvanic isolation, I do not want to tie high voltage schematic pins from a secondary coil to any SMD-pad or through-hole that is exposed to the outermost copper layers.

From my perspective, it would be easy if I could simply place a SMD-pad on an internal layer. You already have control over pad mask, cream, and layer (bottom or top). Why not an internal layer +no cream +no mask?

I have looked around for a while now and have found almost no one sharing how they do planar inductors in Eagle:

Here is my exact question from a 2006 post in the EagleCentral forum (no answer): EAGLE Central Forums: eagle.support.eng » Planar magnetics with SMD-pads at inner layers

I can find a tutorial on YouTube for Altium (but who want to spend that kind of cash when there's Eagle!): https://www.youtube.com/watch?v=qPpYDlLpjyk

Best, Chris

On 26/08/2014 11:47 a.m., Chris Engberg wrote:

.....I am (attempting) to design a planar transformer in Eagle. Something

like this:

http://upload.wikimedia.org/wikipedia/commons/5/59/Planar_core_assembly_exploded.png

 

I want to do this as a package, as I will be reusing this part

repeatedly. A transformer coil (and the routing for the core) would not

be considered part of the final layout process—it is a device—it should

have a symbol and package, right?

 

My transformer is a single symbol in my schematic, with two 'pins' for

each coil. If it was an external transformer, I would just connect these

pins to external SMD-pads that would solder to the external device. But

in this case the coils are embedded in the board and should terminate at

pads to create the proper netlist and ERC from the schematic. (I realize

that any undefined copper for the coils in the package will result in

errors, but that easy enough to dismiss—redrawing without errors is

not).

 

 

For galvanic isolation, I do not want to tie high voltage schematic pins

from a secondary coil to any SMD-pad or through-hole that is exposed to

the outermost copper layers.

 

 

From my perspective, it would be easy if I could simply place a SMD-pad

on an internal layer. You already have control over pad mask, cream, and

layer (bottom or top). Why not an internal layer +no cream +no mask?

 

 

You cannot do it with a standard Eagle device for a number of reasons

the biggest being there are no vias in a package, only pads which drill

from top to bottom. Pad stacks are something asked for over the years

but still have not arrived.

I would do what you want the following way:

You make some of what you want as a package and the rest is created on

the board once. You then you create a script that describes the coils.

There may need to be a ULP to translate the relative coords of the coils

to the place in the future board.

The package gives the part an origin that the script will reference

Add the routing for the 'C'/'E' core holes

Add the tPlace (silk screen print)

Add outer SMD as needed to match with the pins of the schematic symbols

Add anything else that can be done when making the package.

Then on a new board:

Add the package

Draw the coils

Add via between the layers as required

Delete the package

Run the ULP that gathers up the details on the coil(wires)

That's it in a nutshell

You could practice with the ulps that eagle includes

spiral-coil.ulp

That gives you a coil with two vias to play with.

copy-layer-to-any-layer.ulp

That shows you the wires before it draws them. You could copy the

details of your layer using that.

Anyway thats the drift of a technique.

HTH

Warren

On 26/08/2014 11:47 a.m., Chris Engberg wrote:

.....I am (attempting) to design a planar transformer in Eagle. Something

like this:

http://upload.wikimedia.org/wikipedia/commons/5/59/Planar_core_assembly_exploded.png

 

I want to do this as a package, as I will be reusing this part

repeatedly. A transformer coil (and the routing for the core) would not

be considered part of the final layout process—it is a device—it should

have a symbol and package, right?

 

My transformer is a single symbol in my schematic, with two 'pins' for

each coil. If it was an external transformer, I would just connect these

pins to external SMD-pads that would solder to the external device. But

in this case the coils are embedded in the board and should terminate at

pads to create the proper netlist and ERC from the schematic. (I realize

that any undefined copper for the coils in the package will result in

errors, but that easy enough to dismiss—redrawing without errors is

not).

 

 

For galvanic isolation, I do not want to tie high voltage schematic pins

from a secondary coil to any SMD-pad or through-hole that is exposed to

the outermost copper layers.

 

 

From my perspective, it would be easy if I could simply place a SMD-pad

on an internal layer. You already have control over pad mask, cream, and

layer (bottom or top). Why not an internal layer +no cream +no mask?

 

 

You cannot do it with a standard Eagle device for a number of reasons

the biggest being there are no vias in a package, only pads which drill

from top to bottom. Pad stacks are something asked for over the years

but still have not arrived.

I would do what you want the following way:

You make some of what you want as a package and the rest is created on

the board once. You then you create a script that describes the coils.

There may need to be a ULP to translate the relative coords of the coils

to the place in the future board.

The package gives the part an origin that the script will reference

Add the routing for the 'C'/'E' core holes

Add the tPlace (silk screen print)

Add outer SMD as needed to match with the pins of the schematic symbols

Add anything else that can be done when making the package.

Then on a new board:

Add the package

Draw the coils

Add via between the layers as required

Delete the package

Run the ULP that gathers up the details on the coil(wires)

That's it in a nutshell

You could practice with the ulps that eagle includes

spiral-coil.ulp

That gives you a coil with two vias to play with.

copy-layer-to-any-layer.ulp

That shows you the wires before it draws them. You could copy the

details of your layer using that.

Anyway thats the drift of a technique.

HTH

Warren