is the make-symbol-device-package-bsdl.ulp support ibis?

Hi,

The ULP you have mentioned above helps the user to generate the entire device including the symbol and package by just a click of a button. It is indeed a neat feature.

But, I don't think it can generate a IBIS file. An IBIS is a behavioural model that describes the electrical characteristics of the digital inputs and outputs of a device. An IBISmodel consists of tabular data made of current, voltage and RLC parasictic values in the input and output pins. Such models are obtained by gathering data in Simulations or from bench measurements. Since there is no simulation data generated from executing this ulp, an IBIS model probably cannot be generated.

Hope this has answered your question.

Richard, Jorge any comments?

Regards,

Jaya

but ibis file include the pin define and package, not only current, voltage and etc..

such as this section from lxt971a_b_mii_3_32.ibs file:

[Component]      lxt971a_b_mii_3_3
[Manufacturer]   CORTINA_SYSTEMS,_INC.
[Package]
| 64-Pin LQFP Package
| variable       typ                min           max
R_pkg            1.2m               NA            NA
L_pkg            6nH                NA            NA
C_pkg            1.1pF              NA            NA
|
[Pin]         signal_name          model_name       R_pin     L_pin    C_pin
  B1       REFCLK/XI                     INPUT  
  C1              XO                 3X_OUTPUT  
  D3           MDDIS                     INPUT  
  C2           RESET                     INPUT  
  D1         TXSLEW0                     INPUT  
  D2         TXSLEW1                     INPUT  
  D4             GND                       GND  
  E5           VCCIO                     POWER  
  B7              NC                        NC  
  C7              NC                        NC  
  E3             GND                       GND  
  E1           ADDR0                     INPUT  
  E2           ADDR1                     INPUT  
  F2           ADDR2                     INPUT  
  F1           ADDR3                     INPUT  
  G1           ADDR4                     INPUT  
  H1           RBIAS                     INPUT  
  E4             GND                       GND  
  H2           TPFOP                        NC  
  H3           TPFON                        NC  
  G3            VCCA                     POWER  
  G4            VCCA                     POWER  
  H4           TPFIP                     INPUT  
  H5           TPFIN                     INPUT  
  F3             GND                       GND  
  G2           SD/TP                     INPUT  
  F5             TDI                     INPUT  
  G5             TDO                 6X_OUTPUT  
  F6             TMS                     INPUT  
  G6             TCK                     INPUT  
  H6            TRST                     INPUT  
  H7           SLEEP                     INPUT  
  H8           PAUSE                     INPUT  
  G8           TEST0                     INPUT  
  G7           TEST1                     INPUT  
  F8        LED/CFG3           6X_INPUT_OUTPUT  
  F7        LED/CFG2           6X_INPUT_OUTPUT  
  E6        LED/CFG1           6X_INPUT_OUTPUT  
  E8          PWRDWN                     INPUT  
  D5           VCCIO                     POWER  
  F4             GND                       GND  
  D8            MDIO                 1X_IN_OUT  
  E7             MDC                     INPUT  
  D7              NC                        NC  
  D6            RXD3                 3X_OUTPUT  
  C8            RXD2                 3X_OUTPUT  
  B8            RXD1                 3X_OUTPUT  
  A8            RXD0                 3X_OUTPUT  
  A7           RX_DV                 3X_OUTPUT  
  C6             GND                       GND  
  A6            VCCD                     POWER  
  B6          RX_CLK                 3X_OUTPUT  
  A5           RX_ER                 3X_OUTPUT  
  B5           TX_ER                     INPUT  
  C5          TX_CLK                 3X_OUTPUT  
  B4           TX_EN                     INPUT  
  A4            TXD0                     INPUT  
  C4            TXD1                     INPUT  
  B3            TXD2                     INPUT  
  A3            TXD3                     INPUT  
  C3             GND                       GND  
  B2             COL                 3X_OUTPUT  
  A2             CRS                 3X_OUTPUT  
  A1           MDINT                1X_OPEN_DRAIN  
|
|
[Diff Pin]     inv_pin    vdiff    tdelay_typ      tdelay_min        tdelay_max
  H4           H5         1.2V     NA              NA                NA
|
|

so I think it is can be archieved if official do some extend for make-symbol-device-package-bsdl.ulp.

Do you mean that ULP can pick up the Pin number and Signal name from ibis file? and create the symbol?

It is a good ideal, and some EDA tool can support symbol creation from external spreadsheet.

sorry for my bad english make you misunderstanding.

Hi Huayuliang,

sorry, i think i got your first question wrong. From your very first question I inferred that you were asking if an IBIS file could be generated from the "make-symbol-device-bsdl.ulp". But I guess, it was the other way round. Yes, it is certainly possible. The IBIS file contains the Pin number and the signal name, so a ULP can be written which imports the ibis file, reads the pin number, signal name and would generate the symbol/package required.

Regards,

Jaya

Hi Huayuliang,

sorry, i think i got your first question wrong. From your very first question I inferred that you were asking if an IBIS file could be generated from the "make-symbol-device-bsdl.ulp". But I guess, it was the other way round. Yes, it is certainly possible. The IBIS file contains the Pin number and the signal name, so a ULP can be written which imports the ibis file, reads the pin number, signal name and would generate the symbol/package required.

Regards,

Jaya

sorry for my bad english make you misunderstanding.