RG1 1.8v regulator

I just did some digging in the NCP1117 data sheet (ONsemi version).

RG1 is an NCP1117-1v8 fixed linear LDO regulator.  We have suggested that if RG1's regulation voltage Vreg is greater than IC3's (LAN9512) internal Vreg, then RG1 will supply 1.8V current instead of IC3, reducing IC3's power consumption.

The NCP1117 has a "adjustable output" version which sets Vreg using external resistors instead of internal resistors like the NCP1117-1v8.  In addition, you can adjust Vreg of the "fixed" version with an external resistor plus a stabilization capacitor.  Take a look at Figures 31 and 32.  In Figure 31, a 50 Ohm resistor between the NCP1117's GND pin and circuit GND shifts its output by 300 mV.  Figure 32 uses a variable resistor.  Shifting RG1's Vreg up by 90 mV (+5%) might do a nice job of cooling down IC3 -- probably a 15 Ohm resistor.

Figure 31 also confirms that if two NCP1117's are connected in parallel, the LDO with higher Vreg does switch off the LDO with lower Vreg.

I just did some digging in the NCP1117 data sheet (ONsemi version).

RG1 is an NCP1117-1v8 fixed linear LDO regulator.  We have suggested that if RG1's regulation voltage Vreg is greater than IC3's (LAN9512) internal Vreg, then RG1 will supply 1.8V current instead of IC3, reducing IC3's power consumption.

The NCP1117 has a "adjustable output" version which sets Vreg using external resistors instead of internal resistors like the NCP1117-1v8.  In addition, you can adjust Vreg of the "fixed" version with an external resistor plus a stabilization capacitor.  Take a look at Figures 31 and 32.  In Figure 31, a 50 Ohm resistor between the NCP1117's GND pin and circuit GND shifts its output by 300 mV.  Figure 32 uses a variable resistor.  Shifting RG1's Vreg up by 90 mV (+5%) might do a nice job of cooling down IC3 -- probably a 15 Ohm resistor.

Figure 31 also confirms that if two NCP1117's are connected in parallel, the LDO with higher Vreg does switch off the LDO with lower Vreg.

Please provide an URL to the datasheet you found. I searched for NCP1117 and

found: http://unihedron.com/projects/sqm-le/PDFspecs/NCP1117-D.PDF as the first hit. That one doesn't have figures 31 and 32. (but you're referring to figures 28 and 29 in that datasheet).

Just a quick FYI, the NCP1117 you have on your board is most probably not from ON Semi but from a cheap chinese knock off.

-J

Roger Wolff wrote:

 

Please provide an URL to the datasheet you found. I searched for NCP1117 and

found: http://unihedron.com/projects/sqm-le/PDFspecs/NCP1117-D.PDF as the first hit. That one doesn't have figures 31 and 32. (but you're referring to figures 28 and 29 in that datasheet).

http://www.onsemi.com/pub/Collateral/NCP1117-D.PDF

jamodio wrote:

 

Just a quick FYI, the NCP1117 you have on your board is most probably not from ON Semi but from a cheap chinese knock off.

Quite true, so we can pretty much expect that it won't regulate as precisely as a real ON Semi part -- where "real" has to be taken with a grain of element14 dioxide in these days of counterfeit chips.  OTOH, they probably did faithfully copy the NCP1117 circuit (and probably reverse-engineered the masks too) so I expect some  resistor value to work :-)

Now if anyone tries the resistor trick, be sure that 1V8 doesn't get too high -- I wouldn't go above 1.9V as this would cause excess power consumption inside IC3 and the SDRAM.  Power consumption increases linearly with frequency and quadratically with voltage, so you don't want the extra switching power consumption of IC3's 1.8V logic to exceed what was saved by switching off IC3's internal LDO.

Figure 31 also confirms that if two NCP1117's are connected in parallel, the LDO with higher Vreg does switch off the LDO with lower Vreg.

The engineer in me asks which electrical characteristic on the datasheet defines the voltage differential required to turn the regulator off? 

I spotted that too but initially dismissed the idea since I thought they must be assuming constant current drain for those figures based on my misunderstanding of how these regulators worked.

From the description of the adjustable variety, and assuming the fixed version is basically the same with internal resistance, the GND pin is a constant current source (with unknown current due to unknown internal resistors) with a negligible contribution from the internal reference "pin".

"For the fixed output devices R1 and R2 are included within the device and the ground current Ignd, ranges from 3.0 mA to 5.0 mA depending upon the output voltage." - from the datasheet in question.

I can't see anywhere on the datasheet what these internal resistances are or if it is even consistent since the output voltage depends largely on the ratio of these two resistors.

From the two examples for the fixed XT50 we can work out the internal resistance, but I don't get consistent results:

5V=1.25V(1+R2/R1) -> R2/R1 constant

5.3V=1.25V(1+(R2+50Ohm)/R1) -> R1=50Ohm x 1.25/0.3=208Ohm

12V=1.25V(1+(R2+2kOhm)/R1) -> R1=2kOhm x 1.25/7=357Ohm - perhaps that's approximately 12V?

At at any rate, I don't think this is well described by the datasheet. The fact that they included that use case seems to suggest it is supported but don't give the required information to work out the details. I guess it's one of those try it and see kind of designs. I've also got some adjustable regulators here I was planning to try but haven't had time.

Hi all, first post from another refugee...

selsinork wrote:

 

Figure 31 also confirms that if two NCP1117's are connected in parallel, the LDO with higher Vreg does switch off the LDO with lower Vreg.

The engineer in me asks which electrical characteristic on the datasheet defines the voltage differential required to turn the regulator off? 

It's simply the way that the average linear regulator works (caveat alert: there's no schematic in my 1117 datasheet, so I'm assuming a standardish circuit). A linear reg (very basically) dumps current into a load while monitoring the voltage on it's output pin with reference to it's ground pin. A feedback loop varies the current from input to output to keep the output pin at setpoint. If you apply a voltage higher than setpoint to the output pin via a low impedance source the regulator has no way of dumping current from output to to ground internally, so the output voltage is pulled high. The internal error correction then takes a dump (technical term!). So then in this case, the regulator with even a marginally higher output voltage supplies all the current to the surrounding circuitry, while the other is shut down. As has already been mentioned there may be parasitic oscillation, thermal effects... allsorts going on too. There's no easy way to make fixed regulators work in parallel either - best to let the right one do all the work! What's the upper voltage limit of the 1V8 line anyway?

Hope this all makes sense.

There's a report today that adding a heatsink cures networking problems:

http://www.raspberrypi.org/phpBB3/viewtopic.php?f=24&t=14478&start=4

by lajos » Thu Aug 16, 2012 3:01 pm

So I did an experiment. I installed heatsinks on both the SOC and memory chip. It's a small heatsink, the SOC still gets pretty hot (I don't have a surface thermometer, but it's not comfy to the touch.) But now the ethernet works without dropping out.

 

Before heatsink, I would get at tops 40-50KB/s transfer rate, with frequent stalling, with heatsink I can move large files at ~2.0MB/s.

 

Although there is a contrary report as well:

http://www.raspberrypi.org/phpBB3/viewtopic.php?f=28&t=12097&start=247

I added a radiator to the chip but there was no difference. Perhaps it was too small.

 

That is sort of a synonym for "unreliable."

-J

Hope this all makes sense.

Possibly, but everything you say is based on assumption with no actual reference to defined behaviour.

There was a very simple reason for asking that question. If the behaviour is not defined you have no basis to rely on it, you simply don't know if it'll work or not. Saying "It's simply the way that the average linear regulator works" is not an acceptable substitute for actual defined behaviour.  Doesn't anyone question why the behaviour isn't defined ?

The only reference appears to be Figure 31 and that suggests you need 300mV to (reliably?) turn the regulator off. So how does the SoC, RAM etc react 2.1v on it's 1.8v input ?

On the other hand, if it's only a couple of mV then you'll have lots of fun with oscillations as the voltage measurably changes by a few mV depending on how you load the cpu/gpu.

Without a definition of the behaviour it's only ever going to be a bad engineering decision to use it, rely on it, or expect it to work.

Also we don't know what the 1.8v regulator inside the lan9512 is or what it's defined behaviour is, it could be a 1117 clone, or could be something vastly different in design, we simply don't know. We do have an answer from SMSC saying it's not designed to be used this way.