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Raspberry Pi Forum Probing the RP2040 QSPI Flash Interface
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Probing the RP2040 QSPI Flash Interface

scottiebabe
scottiebabe over 2 years ago

As you know SD Cards are bigger Divas than me! With latencies of up to several hundreds of milliseconds and the complexity of a file they can be trying to deal with at times. Not to mention, I don’t usually need gigabytes of storage.

Today there are so many memory chips with a simple SPI interface available. You can get several megabytes of flash/f-ram/psram in an 8-pin package for a dollar or two.

So, I am just trying to learn more about these QSPI memory chips.

I guess the best place to start is by probing known working designs, like the many RP2040 development boards like the RPI Pico or Adafruit’s RP2040 feather.

When the RP2040 comes out of reset it begins execution of its internal bootrom code:

https://github.com/raspberrypi/pico-bootrom/blob/master/bootrom/bootrom_main.c

Where it tries to initialize an SPI memory IC over its SSI interface. It does this by trying to read the first 256 bytes with different CPOL CPHA combinations and looking for a valid second stage bootloader image.

image
image

The last 4 bytes of the 256 byte page are a checksum that the Rp2040 uses to validate that a second stage boot image was found.

image

The RP2040 starts executing the loaded second stage bootloader image and eventually gets ready to start running of external flash.

image

Just before switching over from the 1-bit xx25 interface to QuadSPI the firmware reads status register 2:

image

To switch over to using “Quad I/O Fast Read with Continuous Read Mode” The 0xEB command is sent:

image

With command bits M5-4 = (1,0) subsequent flash reads can omit the command portion:

image

The unfortunate part for me is, I don’t have a QSPI protocol decoder (though it appears neither does a $20,000 oscilloscope *shakes head*). Using a clocked parallel bus decoder gets me close enough I suppose:

image
image

It isn’t too difficult to follow along:

image

For some reason micropython compiled for an Adafruit feather never switches over to QSPI, So in that case I get a nice tabular report using a SPI memory protocol decoder:

image

It is looking quite likely I might be able to boot an RP2040 off an 8MB PSRAM chip in 1-bit SPI mode.

I don’t know enough yet to know how common the QuadIO mode commands and wait cycle counts are between chips.

Thanks for reading Slight smile

Onwards and upwards!

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  • Jan Cumps
    Jan Cumps over 2 years ago

    How did you manage to probe the signals? Tiny wires?

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  • scottiebabe
    scottiebabe over 2 years ago in reply to Jan Cumps

    I choose to probe an Adafruit feather which has an SOIC-8 flash chip, so, I could use 30 AWG wires which I don't find are that difficult to work with. 

    image

    Trying to add mod wires to the tiny DFN package on the pico would be much more difficult! 

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  • dougw
    dougw over 2 years ago

    What kind of improvements might be possible when you get this working?

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  • dougw
    dougw over 2 years ago in reply to scottiebabe

    nicely done - the picture caps it.

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  • michaelkellett
    michaelkellett over 2 years ago

    Hello,

    Interesting !

    Following your post about them I've ordered 100 of the 8Mbyte quad spi RAMs. !

    Picking up on your comment re. logic analysers on scopes or else where.

    You need one of these:

    image

    www.zeroplus.com.tw/.../products.php

    http://www.zeroplus.com.tw/logic-analyzer_en/products.php?pdn=10&pdnex=12

    They have a QSPI decoder - haven't used it yet.

    I used to use a scope (LeCroy Zi6) based logic analyser but I'me given up on the scope based ones for most things and taken to using the 32 channel Zero plus.

    You get a much better logic analyser, with better software and 130 decoders in the price. The 32064M which I have costs about £1400, not  alot more than the probes for a Tek or Keysight scope.

    The 15 channel one is a lot cheaper at about £900.

    (The picture is a current project, an Intel MAx 10 FPGA doing something with signals from shaft encoders. The boards are a Sparkfun ATP MicroMod  carrier board with an Alorium SnoM2 MicroMod on it. These parts were chosen for development as the only way we could get MAX10s to paly with in a hurry. We don't use any of the Alorium software or FPGA code stuff.)

    MK

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  • misaz
    misaz over 2 years ago in reply to dougw

    You can for example use this data for anylsis of cache usage and try to reduce number of transactions you see because when MCU executes instruction which is not in cache (cache data in single clock cycle of the internl bus), then it needs to execute it on the external QSPI bus agains flash memory. External bus is serial, so it take more cycles and also external bus is usualy prescaled to lower frequency. Executing instruction which is not in cache takes tens to hundreds of clock cycles. Optimization (for example code shrinking of the instructions you see most frequently) will result to more performant program execution. This optimizations are generaly hard (without similator) and this tool can give you usefull hints.

    I did similar lookup to the FRAM memory of Cypress PSoC62 devkit as part of my RoadTest review, but I had easier to probe singlnals because FRAM on kit has larger pitch. I also did it only for showing transactions and did not do any complex analysisPSoC 6 Pioneer Kit Roadtest - Project 3 - FRAM (serial-flash library)

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  • Jan Cumps
    Jan Cumps over 2 years ago in reply to scottiebabe

    Meanwhile in Belgium
    image

    also memory on a PICO. (non-quad) SPI Flash

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  • DAB
    DAB over 2 years ago

    It has been a long time since I played with chips at this level.

    Good job.

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  • scottiebabe
    scottiebabe over 2 years ago in reply to dougw

    I don't know yet! I just know companies are making theses memory chips in lots of different flavors and more processors are included dedicated hardware interfaces for them. I am trying to learn more about them! And its pretty neat to have a MCU with 8MB of ram Sunglasses

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  • scottiebabe
    scottiebabe over 2 years ago in reply to misaz

    That is a wonderful blog, I think I will need to apply to the PSOC challenge just to get my hands on a Psoc62 evaluation board Slight smile

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