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  • Path to Programmable III: Ultra96v2 Starter Application A53 cores - Vitis 2022.2

    Introduction In the previous blog post, we created a minimal hardware platform to get started with the Ultra96V2. Path to Programmable III: Ultra96v2 Basic Hardware Platform - Vivado 2022.2 In this post we will continue from where we left things…
  • No output from Hello World

    Hi everyone, I understand this is a very basic issue but I cannot seem to wrap my head around what is going on. So I've a ZedBoard and have made a basic design block which I've used to generate a bitstream and exported hardware with (in Vivado 2020.1…
  • Developing Simple Applications in Xilinx Vitis for Ultra96-V2

    My colleagues at Avnet have published a lot of really sophisticated, powerful scripts and applications that you can run on Ultra96-V2. This includes scripted hardware, PetaLinux, Vitis, and Vitis AI builds that you can find on the Avnet GitHub. narrucmot…
  • 7 Segment Interfacing - Digilent Cmode S6 FPGA Board

    FPGA is fun and easy to learn. Interfacing of Digilent Cmod S6 FPGA development board with 7 segment display. In this code 7 segment display is directly connected to FPGA but it can also be connected through BCD to 7 segment decoder to minimize the number…
  • Raspberry Pi Launches STEM Magazine for Tech Educators, Hello World

    Our good buddies over at Raspberry Pi are big into STEM. That's pretty obvious, really, given their flagship product (the Raspberry Pi) is every bit as useful for kids, as it is adults and retro gamers. And you already know about The MagPi; the official…