I am interested in using OCM, 0xFFFC0000-0xFFFFFFFF as a shared memory region between the A53 running Linux and a bare metal application on the R5. This particular implementation does not require mutual exclusion. On the bare metal side, I clear and invalidate the cache using Xilinx API calls, then read/write to/from OCM using Xil_In32 and Xil_Out32. I can read back what I write, so I know the data (4-byte data chunks) is being written correctly.
On the Linux side I'm getting stale data or garbage when I try to read back what I wrote from the R5. I was thinking perhaps something to do with caching on the Linux side, but handling that is much different than on bare metal.
I was interested in using OCM as its there and already mapped, and I thought it'd be an easier solution, for a very simplistic implementation, than messing around with device trees and shm settings.
