Snickerdoodle board on FLOSS Weekly

I haven't watched the video since most of my computers don't have sound hooked up, so this comment may already be addressed in the video:

Snickerdoodle has a very impressive price for a Zynq board, but what's it doing on FLOSS weekly?  Don't you have to use the proprietary Xilinx Vivado software to program the Zynq FPGA?

The closed toolchain is not ideal, but this is pretty much an universal problem for FPGA design.

I think FLOSS (Free/Libre/Open Source Software) is still relevant if a FPGA based project like this is releasing HDL "source code".

I've not gotten clarification on yet on whether their board is Open Source Hardware.  I hope that they will release schematics, PCB layout and BOM.  Could you comment, rcousins?

So if you have a closed-source binary bitstream for the FPGA that implements a GPU/DSP/accelerator and you openly provide the instruction set that that closed HDL source accelerator executes (Which is also synthesized with a closed source FPGA toolchain).

Then all of a sudden that would be open-source?

Because that's precisely how most semiconductor IP is deployed --- like the ARM or GPU on your RPi/Arduino/BeagleBone

But magically they are more "open source" than Zynq?

Hi Jamil,

You may have a great product, but your last two comments are quite rude. You only quoted a portion of the sentence, it actually said

"in order to get it to do anything much (ie to make serious use of the processor) you need a full blown OS" and that is the case.

Who has the time to re-write the tens of thousands of lines of code that are present in rich Linux libraries to run bare-metal?

To make intensive use of an application processor in a practical amount of time, you do need the support of a full-blown OS.

With all the associated problems of having a team to manage the OS, packages and build.

It seems a team-wide issue. Your colleague (Ryan) was also rude on hackaday to makers in general when he said (quote):

""I am coming to the realization (maybe a little too late) that “makers” really aren’t interested in building anything beyond a LED-enabled garage door opener or an automated cat feeder."

If makers are your target market, then you and your team might want to be polite to potential customers.

Someone else on hackaday said to Ryan "You should really have a friendlier person handling your social media presence. I know you probably didn’t intend it, but you kinda came off as a xyz".

shabaz In reference to the partial conversation you quoted, I subsequently apologized to this person on Hackaday

<<Hi xxx and everyone – I apologize. I haven’t slept much recently…or in a long time. I haven’t had a decent meal in weeks. I haven’t seen a lot of my closest friends in months. I literally wake up and do nothing but work on this project all day every day 7 days a week. It’s not a hobby or a past time. It’s my life. Needless to say, it means a lot to me.

I don’t expect everyone to agree with what we’re doing or find it interesting or really care about us or our project for that matter. I do occasionally let my frustration get the better of me when I hear people badmouthing or second-guessing our intentions, our ability, our dedication, and, in some cases, our integrity. And for that, I am sorry.

We have put more of our time, bodies, and souls into this than most would consider reasonable or even humanly possible. We’ve been told – and continue to be told – it’s a bad idea and that we should give up and do something different/easier for more reasons and by more people than I can count.

Ultimately, if we can’t get anyone else to buy into the *vision* of what we’re proposing to provide, there’s really no one to blame but ourselves. And if that’s that case, it’s just something we’ll have to live with.

So again, my apologies for coming off as a **. My emotions got the better of me.>>

Not sure if you've ever been part of a crowdfunding campaign or a public product launch but to say it's a stressful time would be a severe understatement. I got caught up in the moment (after taking countless personal and professional bashings for a product we'd just released into the wild a few days prior). The moment passed and I have since had dozens of fruitful and civil conversations with the folks at Hackaday and the folks here at Element, like yourself. Only time will tell how the maker audience receives our product, but we certainly hope the initial dream when we started on this project - of making professional-caliber development tools more accessible and usable for makers, students, and hobbyists so that they may take their projects to the next level and directly contribute to the next generation of great technological advances - comes to fruition.

And I'd have to politely disagree with your statement that this was being misrepresented:

"in order to get it to do anything much (ie to make serious use of the processor) you need a full blown OS" and that is the case.

in the sense that these two statements: "in order to get it to do anything much" and "to make serious use of the processor" contradict each other (or, at the very least, one does not imply the other). Maybe to "make serious use of the processor" typically does involve a full-blown OS. But it's just not true that you need a full blown OS to "get it to do anything much." Unless I am misunderstanding what you are saying or you see it differently?

Hi Ryan,

I'm not going to comment any more on the rest, but regarding the OS issue, everyone's opinion on what 'serious use' (which is how the text 'do anything much' was qualified in the original text) means could vary. Serious use means different things to different people, as does doing anything much. I interpret serious use as "using modern protocols, application frameworks and software services which by nature entail using many of the building blocks of the built-in SoC". These would in a lot of cases entail the use of an OS such as Linux in practice. And in other peoples opinion serious use may not mean the same thing at all.

Basically, a body of engineers would agree, and a body of engineers may disagree, and

there is no harm in that.

Which is why it is odd for someone to say it is a "completely false statement" in bold

and italics on this point.

Fair enough, shabaz. Not trying to beat this into submission or anything but (formatting aside), I think you gotta admit that "do anything much" is a generalization - and, contextually or not, it is actually not true. I totally appreciate that this particular comment was being made from one individual's point of view. But there are thousands (or more) of application examples taking full advantage of  uPs yet are not running any sort of OS (i.e. bare metal).

Naturally every system is different and different approaches to the same problem can be equally valid.

Shabaz, I'm not out to hurt anyone's feelings here.  My comments were a bit sarcastic and hyperbolic for the sake of illustration but definitely not intended to be rude or hurtful. 

My interpretation was that the original writer was *complaining* about having to boot a full blown multi-megabyte OS and I was pointing out the the gratis Zynq toolchain heavily directly supports not doing this.

And my reference to "serious applications" wasn't intended to disparage makers but rather contrast the OS support demands of commercial industrial uses (like motor controls) with commercial consumer uses (like BluRay players).   I can assure you genuinely that the comment was not at all directed towards the maker community.

With regards to the second comment my entire point is that the snickerdoodle being held to a higher open-source standard than every other single board computer designed for this market simply because we have an FPGA.   That's not at all fair and equitable at all as noone is asking Broadcom to release the source code to the tools they used to synthesize the VideoCore IV or asking ARM or Intel to do the same for their synthesis tools.

So again I apologize if I hurt anyone's feelings but the original premise of this thread --- that somehow we aren't open-source/didn't deserve to be considered open-source/should have not been interviewed on FLOSS weekly when we are openly giving away a lot of material to the community that was very costly in real dollars $$$ and personal sacrifice to produce and much of which was funded out of own pockets did hurt my feelings.

"ARM and x86 silicon is not software"

Believe it or not so far as we are talking about not having a FLOSS toolchain to synthesize HDL to a particular FPGA, ARM cores are in general provided as HDL and so far as HDL is a software discipline (which is how it is described by at least some portion of industry experts) it is in a sense software.

So in a sense (and especially with gate array ASICs, but progressively less so with Standard-cell and full-custom ASICs) you are very likely already using closed-source HDL defined "silicon" that looks pretty much identical to an FPGA (with the exception of being field re-programmable) and that is characterized as FLOSS friendly/compatible/worthy so long as the instruction set is openly published.

What isn't software arguably is the underlying physical transistor/cell libraries used by the foundries to actually implement the HDL provided by ARM and their licensees (like Broadcom, TI, etc.)

My, but you guys have a serious attitude issue !!

I'm the original writer referred to here:

My interpretation was that the original writer was *complaining* about having to boot a full blown multi-megabyte OS and I was pointing out the the gratis Zynq toolchain heavily directly supports not doing this.

 

and I wrote in response to the suggestion that because your board only costs $55 it makes the Zynq cheap compared with simple FPGA s from Lattice.

I wasn't *complaining* - I was pointing out that there are applications where the Zynq and other similar SOC chips are not appropriate.

And with regard to the cost of the dual ARM application processors on the Zynq - what is the point of them if you don't use them - they cost silicon (ie money) power etc. And how much other stuff does your 5 line program drag into the system ?

And yet another point - the "gratis" tool chain  - is that like Free-as-in-Beer but with an overtone that we should damn well be grateful too !

If I use a stand alone processor I can CHOOSE the tool chain (which I think was part of the point JB was making).

Let's get this into perspective,

the Zynq is a nice chip for the applications that it fits, it's not the only FPGA SOC (Micro Semi and Altera have parts too), it's not the first (that was Atmel) and it isn't the answer to every FPGA user's prayer.

Your board may be quite nice too (I said that earlier)  - it's certainly cheap but if you want to prototype a mW power data logging system it's about a such use as bull in a china shop.

You need to lighten up a bit, fine to be proud of your work but don't oversell it, and don't be so pushy - other people have feelings (and brains) too.

MK

Michael Kellett wrote:

 

And yet another point - the "gratis" tool chain  - is that like Free-as-in-Beer but with an overtone that we should damn well be grateful too !

I'm grateful for Free Beer -- especially at the end of a long day at the Embedded Systems Conference or ARM TechCon

Jamil Weatherbee wrote:

 

"ARM and x86 silicon is not software"

 

Believe it or not so far as we are talking about not having a FLOSS toolchain to synthesize HDL to a particular FPGA, ARM cores are in general provided as HDL and so far as HDL is a software discipline (which is how it is described by at least some portion of industry experts) it is in a sense software.

As a matter of fact, I don't believe it.  In my experience, hardware and software are very different and suited to very different things.  When designing hardware you have to think about everything happening at once, and how to make them all happen at once faster, whereas with software you're usually thinking about a single often complex thread of execution.  Verilog looks a lot like C, which is convenient but can be misleading.  Marketing would like you to believe that a C programmer can effortlessly become a Verilog designer because the languages have similar syntax.  In practice, I've heard that many C programmers try to write in Verilog as if it were C and produce terrible designs.

At Design West 2013 there was a talk called "FPGA Design: What works and what makes you work weekends" at the Expo Theater.  The two speakers were Charles Fulks and RC Cofer.  According to my notes, it was Charles Fulks who said he preferred that his FPGA designers use VHDL instead of Verilog to make it obvious that they aren't using a programming language and must think differently.

I don't know who your industry experts are who think of "HDL as a software discipline", so if you supply links I might be interested in how they come to that conclusion.

Jamil Weatherbee wrote:

 

"ARM and x86 silicon is not software"

 

Believe it or not so far as we are talking about not having a FLOSS toolchain to synthesize HDL to a particular FPGA, ARM cores are in general provided as HDL and so far as HDL is a software discipline (which is how it is described by at least some portion of industry experts) it is in a sense software.

As a matter of fact, I don't believe it.  In my experience, hardware and software are very different and suited to very different things.  When designing hardware you have to think about everything happening at once, and how to make them all happen at once faster, whereas with software you're usually thinking about a single often complex thread of execution.  Verilog looks a lot like C, which is convenient but can be misleading.  Marketing would like you to believe that a C programmer can effortlessly become a Verilog designer because the languages have similar syntax.  In practice, I've heard that many C programmers try to write in Verilog as if it were C and produce terrible designs.

At Design West 2013 there was a talk called "FPGA Design: What works and what makes you work weekends" at the Expo Theater.  The two speakers were Charles Fulks and RC Cofer.  According to my notes, it was Charles Fulks who said he preferred that his FPGA designers use VHDL instead of Verilog to make it obvious that they aren't using a programming language and must think differently.

I don't know who your industry experts are who think of "HDL as a software discipline", so if you supply links I might be interested in how they come to that conclusion.

I would classify it as hardware too. But the fact that we're discussing it here - (and more similar discussions are happening on the webs) - may indicate that we're verging into an area where boundaries are new and not so clear.

The reason why I consider it hardware is because a VHDL or Verilog source file can be represented as a schematic (you can convert from HDL to schematic and vice versa). And for me that means it's hardware. But I also think that someone can step in and just invalidate my arguments here.

Jan Cumps wrote:

 

I would classify it as hardware too. But the fact that we're discussing it here - (and more similar discussions are happening on the webs) - may indicate that we're verging into an area where boundaries are new and not so clear.

 

The reason why I consider it hardware is because a VHDL or Verilog source file can be represented as a schematic (you can convert from HDL to schematic and vice versa). And for me that means it's hardware. But I also think that someone can step in and just invalidate my arguments here.

I agree that the line between software and hardware is fuzzier than it has ever been.

An interesting thought experiment would be to consider that for the kind of deterministic bounded software we are talking about (meaning the kind that runs on a conventional computer) there necessarily exists a schematic that would describe any real conventional computer and the initial program that is loaded into its memory at reset.

John Beetem wrote:

 

As a matter of fact, I don't believe it.  In my experience, hardware and software are very different and suited to very different things.  When designing hardware you have to think about everything happening at once, and how to make them all happen at once faster, whereas with software you're usually thinking about a single often complex thread of execution.  Verilog looks a lot like C, which is convenient but can be misleading.  Marketing would like you to believe that a C programmer can effortlessly become a Verilog designer because the languages have similar syntax.  In practice, I've heard that many C programmers try to write in Verilog as if it were C and produce terrible designs.

 

At Design West 2013 there was a talk called "FPGA Design: What works and what makes you work weekends" at the Expo Theater.  The two speakers were Charles Fulks and RC Cofer.  According to my notes, it was Charles Fulks who said he preferred that his FPGA designers use VHDL instead of Verilog to make it obvious that they aren't using a programming language and must think differently.

 

I don't know who your industry experts are who think of "HDL as a software discipline", so if you supply links I might be interested in how they come to that conclusion.

Informally I've heard it described this way on several occasions by others and it is the way I have also personally experienced hardware design having started very young in embedded with a low-level software approach (assembly, Forth, C) eventually moving mostly to analog, power electronics and digital hardware design.

One formal reference I can quote that implies this is Peter J. Ashenden's 2008 tome on VHDL "The Designer's Guide to VHDL Third Edition" pp. xvii:

"One pervasive theme running through the presentation in this book is that modeling a system using a hardware description language is essentially a software design exercise.  This implies that good software engineering practice should be applied.  Hence the treatment in this book draws directly from experience in software engineering."

Also, I can point out that technologies like model based design, HDL simulation, high level synthesis and massively parallel programming suggest a much stronger link between software and hardware disciplines than I think is commonly credited.

Jamil Weatherbee wrote:

An interesting thought experiment would be to consider that for the kind of deterministic bounded software we are talking about (meaning the kind that runs on a conventional computer) there necessarily exists a schematic that would describe any real conventional computer and the initial program that is loaded into its memory at reset.

Absolutely.  You can take all the expressions in a program and convert them into a data flow graph, which is essentially the same as a schematic.  Optimizing compilers do this.  You can then take the control flow sans expressions and render it as a flowchart, which maps trivially into a one-hot state machine implementation.

That makes a nice model, but is an absurd way to implement software.  Any practical program results in a huge amount of logic, only a tiny fraction of which needs reëvaluation on any given clock cycle.  The reason a microprocessor is such a cheap way to implement software is that the logic functions are all shared by a single CPU or a small number of them.

John Beetem wrote:

 

Absolutely.  You can take all the expressions in a program and convert them into a data flow graph, which is essentially the same as a schematic.  Optimizing compilers do this.  You can then take the control flow sans expressions and render it as a flowchart, which maps trivially into a one-hot state machine implementation.

 

That makes a nice model, but is an absurd way to implement software.  Any practical program results in a huge amount of logic, only a tiny fraction of which needs reëvaluation on any given clock cycle.  The reason a microprocessor is such a cheap way to implement software is that the logic functions are all shared by a single CPU or a small number of them.

And that CPU is a FSMD.  I think the very fact that you can implement general purpose microcontrollers/microprocessors in an FPGA at a relatively low cost addresses the practicality of the model I was using.

My point was that the initial "code" and "data" can be described as a schematic containing flip flops that are wired to reset in a specific state. 

Jamil Weatherbee wrote:

 

One formal reference I can quote that implies this is Peter J. Ashenden's 2008 tome on VHDL "The Designer's Guide to VHDL Third Edition" pp. xvii:

"One pervasive theme running through the presentation in this book is that modeling a system using a hardware description language is essentially a software design exercise.  This implies that good software engineering practice should be applied.  Hence the treatment in this book draws directly from experience in software engineering."

This brings up an interesting issue with VHDL and Verilog.  VHDL stands for VHSIC Hardware Description Language, originally designed to document and simulate IC behavior.  Simularly, Verilog (from Verification+Logic) was also designed originally for simulation.  As new users discover to their chagrin, neither language was created as a hardware design language and it's easy to write VHDL or Verilog that simulates fine but when you try to synthesize for an FPGA it either doesn't work or generates horrible logic.

So you can in fact write VHDL or Verilog that is very much like software, but you'll probably regret it

John Beetem wrote:

 

This brings up an interesting issue with VHDL and Verilog.  VHDL stands for VHSIC Hardware Description Language, originally designed to document and simulate IC behavior.  Simularly, Verilog (from Verification+Logic) was also designed originally for simulation.  As new users discover to their chagrin, neither language was created as a hardware design language and it's easy to write VHDL or Verilog that simulates fine but when you try to synthesize for an FPGA it either doesn't work or generates horrible logic.

 

So you can in fact write VHDL or Verilog that is very much like software, but you'll probably regret it

There is only a subset of VHDL that is trivially synthesizable.  The rest can be used for test benches, system simulations or even as a general purpose parallel programming language that is executable on an ordinary computer.

However, the ordinary computer you are running that test bench, simulation or program on can definitely be described in a synthesizable form of VHDL and so it follows logically that all VHDL in a sense can be hardware or software which begs the original question:  is there even a difference?

Now, at the risk of starting a religious war over the software vs. hardware question I would assert that some forms of describing computation are less difficult than others for humans to utilize and this depends on both the application and who/what is expressing it but ultimately the hardware expression of computation is always equal or more capable than the general purpose software expression.  That's why http://snickerdoodle.io has both so you can pick what you want to use.  This isn't intended as a plug specifically but that in my mind makes an FPGA SoC the ultimate computing resource.

Jamil Weatherbee wrote:

 

... which begs the original question:  is there even a difference [between hardware and software]?

Probably my favorite computer science quote is from David Wheeler: "All problems in computer science can be solved by another level of indirection."

Software always involves a level of indirection.  Software produces machine code that needs to be interpreted by a computing machine, whereas hardware doesn't need this level of indirection.  Hard to say what this means for FPGAs: are an FPGA's LUTs, configurable muxes, and Programmable Interconnect Points (PIPs) another level of indirection or merely a trivial implementation detail?  I would say the latter, since it is trivial to map an FPGA into a hard-wired gate array, replacing the programmable LUTs, muxes, and PIPs with wires and vias.

JMO/YMMV