We will be roadtesting the AVNET MiniZed FPGA SoC development board in September. I find this to be an exicting prospect and can't wait to let it loose on the element14 community.
In brief, the MiniZed is a single-core Zynq 7Z007S development board. This board targets entry-level Zynq developers with a low-cost prototyping platform.
The Minized's compact design features on-board connectivity through USB, Wi-Fi and Bluetooth. Peripherals can be plugged into dual Pmod-compatible connectors, the Arduino-compatible shield interface or the USB 2.0 host interface. JTAG circuitry is incorporated onto the MiniZed base board, so with a single micro-USB cable to your laptop you are already up and running. User LED’s, a button and a switch allow for a physical board interface.
Micron memory solutions are presented for QSPI flash, DDR3L memory and on-board eMMC instead of an external SD card. The Murata Type 1DX wireless solution incorporates 802.11b/g /n Wi-Fi as well as Bluetooth 4.1, which provides both Bluetooth Classic and Low Energy (BLE). The integrated power supply from Dialog generates all on-board voltages, while an auxiliary supply input can be used to power designs that require additional current. From ST Micro there is an on-board motion and temperature sensor, as well as a digital microphone.
MiniZed provides for an efficient hardware reference design, while it is also an inexpensive board that can be used to run workshops and tutorials. The board aims to showcase the power of Zynq, where the Cortex A9 processor core integrates seamlessly with the programmable fabric to provide signal processing and control solutions. The on-board digital microphone serves as an input for a variety of illustrations of how to implement FIR filters, FFT’s and direct memory access.
Feel free to download the attached pdf to learn more about the Minized.
In preparation of roadtesting the Minized, what do you feel you need?
- Technical Information?
- Tutorials?
- Example Projects?
- Other?
Please leave your comments below. I will try to get any additional information and post it to both the RoadTest and the FPGA groups.
Sincerely,
Randall Scasny
RoadTest Program Manager