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Blog IRPS5401 PMIC cold start spec change
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  • Author Author: ctammann
  • Date Created: 19 Apr 2021 10:21 PM Date Created
  • Views 947 views
  • Likes 3 likes
  • Comments 3 comments
  • ultra96-v2
  • infineon
  • ultrazed
  • avnet
  • xilinx
  • irps5401
  • ultra96
  • som
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IRPS5401 PMIC cold start spec change

ctammann
ctammann
19 Apr 2021

If you've read any of my material or attended the webinar I put on a while back you will know I'm a big fan of the IRPS5401. It is a great device with a ton of features in a very affordable package. We've used it on multiple platforms over the years and it has worked out great, even allowing us to fix issues retroactively without having to spin hardware.

image

For reference I linked a few of my related blogs below.

 

Benefits of Power System Telemetry Using PMBus

Infineon PMIC updates to Avnet products

Updating PMIC on Ultra96-V2 through the 2020.1 BSP!

Updating PMIC on UltraZed EV through the 2020.1 BSP!

 

I do need to pass along some new information though. The Infineon IRPS5401 datasheet was revised in January, revealing a new requirement for operation under 0C. For cold start applications (under 0C) it is now part of the datasheet spec that the output enable be held low for 60ms after power is applied to the input. The 60ms requirement is worst case. Here is the excerpt from the datasheet:

 

image

This requirement change has resulted in us doing an evaluation of our products that are offered in an industrial temp version, UltraZed EV, UltraZed EG and Ultra96-V2. Testing on these platforms was performed during development, however at the time no issues were discovered. Nonetheless, we are now re-evaluating all three to determine what, if any, changes are needed. We haven't determined our final solution yet, but I will post a follow up blog when we've finished our evaluation with findings.

 

Adding that timing change can be done by adding an RC time constant to the enable pin, setting a delay using the programmable configuration, or a combination of the 2. Again, this change is only required for designs operating under 0C. I'll post an update on the Avnet products featuring this device as soon as our plans are finalized. That information will also be formalized in an errata and/or product change notice.

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  • ctammann
    ctammann over 1 year ago

    Sorry for the delay, but here is a link to an update blog specifically as it pertains to the UltraZed family - /products/devtools/avnetboardscommunity/b/blog/posts/ultrazed-eg-and-ev-cold-start-issue--40c-fix-and-ecn-info

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  • ctammann
    ctammann over 2 years ago in reply to bhfletcher

    The failure mode hasn't been characterized by Infineon, but I believe it is a failure in the internal IC logic. Therefore I don't believe simply entering continuous hiccup mode (continuous restart tries) will break it from a "non power up" state. I have not been able to capture the failure mode with the dongle attached to be able to read if the IC responds to digital commands or not. My understanding is the only way to recover from the failure to start mode is to power cycle the input. If I learn this to be untrue I will update, but I don't believe the logic is "alive" to try and restart through bus commands if it fails to start at cold.

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  • bhfletcher
    bhfletcher over 2 years ago

    Thank you ctammann for this valuable information! I have benefitted personally from the capabilities of this device on the Ultra96-V2 as we modified things to support more advanced designs.

     

    What happens if you don't meet the 60ms delay? What are the symptoms of failure? After the failure, can a reset be issued to recover?

     

    Bryan

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