DAC8775 Quad-Channel DAC EVM - part 5: HART Interface

HART Protocol

The HART protocol communicates info on a current loop by adding a small AC component to the current loop.

The frequency of that component defines that you're sending a mark (1200 Hz) or space (2200 Hz).

That's all I'll tell about the protocol. The blog is not about how it works, but how to use it with the DAC8775.

Secretly I hope this gets you interested in a widely used industrial communication protocol,

DAC8775 and HART

From the DAC8775 datasheet:

The HART peripheral is only useful in current mode. The HART signal is a communication component added to the current output that DAC is set to.

The DAC8775 implements the physical layer. It doesn't know HART protocol or data handling, but can generate the compliant signal on its output.

In essence, it accepts a sinusoidal signal of 0.5 Vpp, either 1200 or 2200 Hz, and translates that in an AC current component on the output of 1 mA

The image above, from the DAC8775 datasheet, shows how the DAC, when set to a  6 mA DC output current, mixes a HART signal of 0.5 mApp to it.

EVM Board Modification

The evaluation kit used in the element14 Road Test has no breakout point for the HART inputs. On each of the 4 DAC channels, that pin is coupled to ground via a capacitor.

I'm using channel A, so I have removed the capacitor for that module's HART input - C58, and soldered a patch wire to the PCB.

The HART input signal has to be capactive coupled. The HART pins on the DAC8775 have a DC bias. I used a 0.470 µF capacitor.

According to the data sheet, a value between 10 and 20 nF is recommended. I wasn't in the mood to go look for one.

Testing the HART Interface

There are two things you have to do:

• enable the HART interface on the DAC in your firmware
• provide the HART input signal. A sinus of 0.5Vpp, with 1200 or 2200 Hz frequency.

To enable the HART interface, you need to set bit 13 of the DAC Config register 0x04.

In our initial example, we were setting the bit 12 high, because we enabled the DAC output.

So we only have to change that part of the code, and instead of sending 00010000b (0x10), we send 00110000b (0x30).

    TX_Data_Master[0] = 0x04;
//    TX_Data_Master[1] = 0x10; // output on, default slew rate without HART
    TX_Data_Master[1] = 0x30; // output on, default slew rate with HART
    TX_Data_Master[2] = 0x05; // slew rate off, 0 - 20 mA mode
    /* Initiate SPI3 Transmit and Receive through Polling Mode */
    spiTransmitAndReceiveData(spiREG3, &dataconfig1_t, 3, TX_Data_Master, RX_Data_Master);

We're setting an output current of 10 mA. Or range is from 0 to 20 mA, so we need to set the half of 0xffff: 0x07ff.

    TX_Data_Master[0] = 0x05;
    TX_Data_Master[1] = 0x7f;
    TX_Data_Master[2] = 0xff;
    /* Initiate SPI3 Transmit and Receive through Polling Mode */
    spiTransmitAndReceiveData(spiREG3, &dataconfig1_t, 3, TX_Data_Master, RX_Data_Master);

That's all for the firmware. If you run it, the HART intrface for Channel A is enabled.

I simulate the HART signals with a generic function generator. I set it to sinus 1200 and 2200 Hz. I used my oscilloscope to set up a 500 mVpp output after the coupling capacitor of 0.470 µF.

Then I inserted the signal into the DAC and checked the output. Just like in the previous blog, I used an EEVBlog µCurrent as a load. It translates the DAC's output current into a voltage.

I attached channel 2 of my oscilloscope to the output of the µCurrent.

The yellow signal is the HART input, generated by the function generator. It's 500 mV, 1.2 kHz.

The blue signal represents the DAC's output current. Each mA is a mV on the Oscilloscope display.

You see the DC component of 10 mA, and the 0.5 mVpp AC component superposed by the HART interface.

For the reader, this isn't spectacular. But in industrial installations, this can be used (and is regularly used) as a digital communication path over the commonly used analog instrumentation current loops.