Hercules LaunchPad and GaN FETs - Part 2: Make a BoosterPack

Jan Cumps

12 Sep 2016

I'm designing a BoosterPack to evaluate GaN devices with the help of a microcontroller.

The kit will have a GaN half-bridge that can control an output of 20V and 10A.

Currently the prototype can control switching frequency and duty cycle.

I'm also planning a stretch goal to integrate the design with LabView. You can then use this as a part of a test setup.

The Design Exists

I have a working prototype. I modded an existing LMG5200 evaluation kit a while ago.

I removed the discrete PWM generator and replaced it with microcontroller managed signals.

This proof of concept works, both electronics and firmware. I can make a more sturdy version now.

The switching layout is fully based on the design guidelines and the evaluation kit's PCB.

Because of the high switching frequencies and high currents, that part of the design is critical.

I'm trying to place all components similar to the application notes. This will be my first 4-layer PCB design.

Status

I have the schematic ready.

I had to create a few components and footprints (both for LMG5200 and rotary encoder, footprint only for the inductor).

For the PCB, I have a provisional layout. I haven't routed a single trace yet.

But I have uploaded that intermediate status to OSHPark to get an idea of how this device will look like.

Before doing that routing, I first have to verify if I can source all the components that I'm planning to use.

In particular the SMD 360° rotary encoder may be a tricky purchase.

To be continued...

Related Blogs
Hercules LaunchPad and GaN FETs - Part 1: Control Big Power with a Flimsy Mouse Scroll Wheel
Hercules LaunchPad and GaN FETs - Part 2: Make a BoosterPack
Hercules LaunchPad and GaN FETs - Part 3a: BoosterPack Layout - Reference Design
Hercules LaunchPad and GaN FETs - Part 3b: BoosterPack Layout - my version
Hercules LaunchPad and GaN FETs - Side Note A: BoosterPack Layout - Custom KiCad Parts
Hercules LaunchPad and GaN FETs - Side Note B: Look at the PCB
Rotary Encoders - Part 1: Electronics
Checking Out GaN Half-Bridge Power Stage: Texas Instruments LMG5200 - Part 1: Preview
Rotary Encoders - Part 4: Capturing Input on a Texas Instruments Hercules LaunchPad with eQEP
Vintage Turntable repair: Can I fix a Perpetuum Ebner from 1958 - part 4 - Hercules LaunchPad Enhanced PWM try-out

Top Comments

Parents

jc2048 over 8 years ago

A PCB! And it's a Boosterpack (whatever that is)!

I don't know what you intend for the tracking (please don't say it's going to be a job for an autorouter, entertaining though that might be), but wouldn't it work better if you rotated P3 (the output connector) by 180 degrees. It would then allow you to have the power ground (input gnd - GaN - output gnd) as copper on the top layer. Since all the power tracking could then be copper on the top, you might consider whether it would work well enough as a 2-layer board.
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Jan Cumps over 8 years ago in reply to jc2048

I'm using the layout advice in the 'Layout Considerations for LMG5200 GaN Power Stage' appnote from the manufacturer.
They have a proposal for a double layer pcb in the datasheet with this remark:
To maximize the efficiency benefits of fast switching, its extremely important to optimize the board layout such
that the power loop impedance is minimum. When using a multilayer board (more than 2 layers), power loop
parasitic impedance is minimized by having the return path to the input capacitor (between VIN and PGND) small
and directly underneath the first layer

[...]

Two-layer boards are not recommended for use with LMG5200 device due to the larger power loop inductance.
However, if design considerations allow only two board layers, place the input decoupling capacitors immediately
behind the device on the back-side of the board to minimize loop inductance.

Four layer layout:

Two layer layout:
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Jan Cumps over 8 years ago in reply to jc2048

Loads of things to reply to . I'll start with one: the planes capacity:

this is a hybrid FET driver, with virtually everything that's time/capacity/inductance critical embedded inside the IC package. There are two exceptions:
- the separate high and low input signals: you need to keep the traces approx. the same lenght - else you can't achieve deadband as short as 7ns.

- the inductance of that return path at the switching output we discussed in the comments. That's the only high current high frequency part that's exposed to the pcb. The other side of the coil, the ac component of the signal is already significantly reduced.

the rest of the layout is more focused in being able to get significant current in and out, and to get heat dissipated. At that point, any board capacity is almost an added value to the real capacitors.
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Jan Cumps over 8 years ago in reply to jc2048

... i thought I had published a blog about the pcb layout, but I see it's still in my drafts - unfinished.
I'll upload the KiCAD project to that post, so that you can see what net is connected to wich plane.
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Jan Cumps over 8 years ago in reply to jc2048

I've posted a blog about the PCB layout. The idea was to include my own layout to that blog, but I can't upload images since this afternoon.
It does contain the 4 layers of the TI evaluation kit - captures of their published Gerber files.
Hercules LaunchPad and GaN FETs - Part 3a: BoosterPack Layout - Reference Design
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Jan Cumps over 8 years ago in reply to jc2048

I finally have the post with the PCB design up, I'm still struggling with e14 image uploads - the schematic couldn' be updated to the post.
But at least I have the 4 layers, with annotations to what flood fill holds what signal.

Hercules LaunchPad and GaN FETs - Part 3b: BoosterPack Layout - my version
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shabaz over 8 years ago in reply to Jan Cumps

Hi Jan,

This is looking very nice!!
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