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  • Author Author: Andrew J
  • Date Created: 18 Jul 2019 8:37 PM Date Created
  • Views 3762 views
  • Likes 8 likes
  • Comments 32 comments
  • bench_power_supply
  • bench power supply
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YAPS Part Eleven - Further Testing

Andrew J
Andrew J
18 Jul 2019

EDITS: 21/07/19 - added a PDF of the schematic

            11/08/19 - updated navigation links

 

Introduction

My intention was to document, in some detail, testing of the power supply with both a 10 Ohm and 5 Ohm load (to drive the current from 0A to 3A.)  To summarise, I’m seeing a number of problems - see later - and I thought I’d document where I’ve got to as I need to do some thinking about this.  See my conclusion at the end.  TL;DR; It isn't working as well as I hoped!

 

I’ve broken the testing down as measured testing and Noise and Ripple testing.  If you can see problems with how I’ve done this testing, or ways of improving it, or indeed other tests you’d like to see, please let me know so I can improve or report additional results.

 

For the measured testing, I’ve captured data for the following tests:

  • Voltage and current comparison test
  • Steady state operation/voltage stability
  • Rise Time
  • Overshoot/Undershoot when turning on the mains switch; turning off/on load switch; lowering voltage level down to 0V; raising voltage level up to 15V
  • Soak test over 1 hour to measure temperatures and voltage stability

 

My scope was warmed up for 30 minutes before taking any measurements.

 

Environment and Setup

By necessity, the following equipment is turned on and plugged in to the same power strip as the scope and power supply: FTTP Modem, Router.  Also operating, but plugged in to a different power strip: iMac, AOC monitor, USB hard drive.

 

The probe was used with a short ground connector

image

 

Images on other blog posts show the setup and layout of the prototype board.

 

10 Ohm Load

The load is a 10.08 Ohm, 100W resistor, connected through its solder lugs (although not soldered.)  For all these tests, using the scope, the probe was set at 10x, full bandwidth, and a timebase that allowed for 1GSa/s where possible, measuring DC, and connected across the control stage output terminals.

 

Voltage and Current measurement

Essentially, this is a comparison test of DMM measurement vs INA260 vs 4Duino.  I took readings at various voltage settings, reported in the table below.

  • DMM voltage was measured at the Control Stage output terminal
  • DMM current was measured in series between Control Stage output and load
  • INA260 voltage was measured at Vin to the chip
  • INA260 current was calculated using ohms law from the measured voltage at INA260 Vin.
  • 4Duino voltage and current as reported on the screen
  • 10.08 Ohm load

 

image

The Extech, measuring current, has a resolution to 2DP (i.e. 10mV).  These results seem pretty good to me, particularly current.

 

The table following shows measurements with NO load attached (voltage only of course:

image

Again, very good.

 

Steady State Measurement

These images were captured off the scope

15V - 3.02V / division

image

10V - 2V / division

image

5V - 1V / division

image

0.5V - 100mV / division

image

As you can see voltage is steady but the noise is more apparent with the scope set in the 100mV division range.  More on noise in later tests.

 

Rise Time

3.02V/div.  Normal trigger set at 181mV.  Timebase at 5mS.

image

LTSpice simulation rise time:

image

The actual rise time to the set voltage is 12.7ms actual vs 2.1ms simulated.  There are similarities in the waveform but it's not clear why the rise time is so slow - my suspicion falls on the MOSFET, see Conclusions.

 

Overshoot

The scope timebase was set at 100uS and sample rate at 1GSa/s.

Voltage control on the supply was set so 4duino was reporting 15v;  Trigger set to 15.46V, rising edge, normal mode.

 

Mains Switch test: mains turned off then back on.  No triggering occurred.  Trigger set to 15.4V and test repeated.  Waveform displayed - noise is triggering the waveform.

Load Switch test: mains is on, load switch turned off then back on.  No triggering occurred.  Trigger set to 15.4V and test repeated.  Waveform displayed - noise is triggering the waveform.

Rising Voltage test: voltage control turned to 0V and waveform confirmed on the scope.  Trigger set back to 15.46V, normal.  Voltage control rapidly turned to increase volts.  No waveform triggered before measured volts reached 15V.  No overshoot observed.  Reset voltage control back to 0V and trigger to 15.4V and repeated.  Waveform was displayed at a reported 15V (4Duino).  Again, noise is triggering the waveform.

 

There doesn't appear to be any actual overshoot occurring - no high spiking - but noise is making it difficult to accurately assess if there’s a low-mV overshoot.

 

Undershoot

The scope timebase was set at 100uS and sample rate at 1GSa/s.

Voltage control set so scope was seeing 15V.  Trigger set to -0.6V, falling edge, normal mode.

Mains Switch test: with voltage control set at 15V the mains switch was turned off.  Waveform displayed.

Load Switch test: with voltage control set at 15V and mains switch turned on, the load switch was turned off.  Waveform displayed

Lowering Voltage test: Voltage control rapidly turned from 15v to decrease volts.  No waveform triggered until around 0.24V - again, this seems to be the result of noise (and is in line with the triggering on the overshoot.)

 

I’m not convinced I’m measuring these undershoot tests correctly, when operating the switches, as whatever position I set the trigger to (e.g. -60mV, -340mV) a waveform is displayed at that value when the switch is activated, but there is no spiking, just a steady voltage line.  Lack of experience with scopes I think, but thoughts would be appreciated?

 

Soak Test

This didn’t involve the scope, just readings from the 4Duino - I'm particularly interested in reported temperatures.  Power supply was left off to cool to ambient and then turned on for 1 hour at 15.5V and measurements recorded.  At the end of the hour, I used a thermocouple on a multimeter to cross-check recorded temperatures and sample other components on the Control Stage PCB.  Other components’ are the Schottky Rectifiers, 5V regulator and LT3092 current control.

 

image

Other components measuring between 40c and 45c.

These results seem pretty reasonable to me - no components seemed to overheat anywhere near their limits.  Voltage had drifted down by 50mV from its initial peak setting - I’m wondering if that is due to the heating of the load resistor which is quite warm given it’s dissipating over 23W of power.

 

5 Ohm Load

The load is actually 5.08 Ohm, 100W resistor connected through solder lugs (although not soldered).   I had intended to undertake the same testing as for the 10 Ohm load but the supply will only provide for 8.5V / 1.6A (approx) rising slowly over 6 minutes to 8.87V / 1.7A, and still rising.  Something clearly isn’t right so there doesn't seem much point until I investigate further.  I tested with a 1000 Ohm resistor (I only have 0.25W unfortunately) and that was ok.  I don’t have another power resistor to try with.  Not only that, I have noticed that touching the -ve line from the current control potentiometer drops about 2V on the output - see the video

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No other leads do this and I have tested continuity (power off) and it’s solid.  I’ve even replaced the connector.   If I connect the 10 Ohm load and try this experiment, it has no affect; ditto no affect if no load is attached.

As a thought, I’m wondering if the bad output is the result of current limiting from the circuit? I can drop it down from whatever the current reading is to 0A with the potentiometer.  Could the 5 Ohm resistor be faulty?  It’s a 1% resistor measuring 5.08 Ohms so is slightly out of spec but I put this down to the DMM?

 

Noise and Ripple Testing

Noise and ripple are poor which I need to sort out.  For the sake of documenting the testing, I’ve included images below to show what I mean.

Baseline

I took some measurements with the power supply off to get a baseline level.  Same timebase and voltage division; bandwidth limited; 1x probe, AC coupled.

 

Background noise, no probe connected to the scope, power supply off:

image

Background noise, probe held, power supply off:

image

Background noise, probe on ESD mat (connected to ground), power supply off:

image

Background noise, probe held away from power supply, power supply on:

image

Background noise, probe held by power supply, power supply on (good heavens!):

image

Supply Measurements

Supply on at 15v.  Timebase and/or voltage division selected to show noise; bandwidth limited; 1x probe, AC coupled.

 

10 Ohm Load attached, powered through RCD (1st image), no RCD (2nd Image):

imageimage

No load attached, powered through RCD (1st image), no RCD (2nd Image):

imageimage

And here's a couple with the timebase changed, both without RCD.  With load (1st image) and no load (2nd image):

imageimage

 

I think it's fair to say these are NOT good results and I need to do something about it.  Again, I suspect the MOSFET.

 

Current Position

As I noted at the start, I decided to document the testing progress so far as there are clearly issues and I guess part of this whole project was to document how it came together, good and bad!  The 5 Ohm load results I’m not sure what to make of or how to proceed - it clearly doesn’t like such a low resistive load but I don’t have any other way I can think of of testing it.  I can’t understand what is up with the current control connection either - why would touching it with such a low load affect the voltage?

 

I’m wondering if the Mosfet is causing some of the issues.  In this thread, Jon Clift points out it may well cause problems and it is definitely out of conformance to the requirement of the LTC1624 which requires a maximum 2000pF of input capacitance on the connected Mosfet (the one I have is 3247pF so way over.)  I’ve hunted down another one, IRL8721PBF, but it’s not easy!  There are 10s of thousands of the things and the parameteric search on Farnell/CPC is hopeless for purpose.  I’m also not sure what the important specs to look for are but I have read around and here’s a comparison of what I think the important ones are:

image

The rise/fall/delay times seem to be heavily dependent upon the specific circuit they were tested with but I quote them for comparison purposes.  The Total Gate Charge seems to be a better indicator of switching time and the IRL is significantly better.  The input capacitance is well within requirements as well.

 

My approach now is to:

  • replace the MOSFET with the IRLB8721.
  • replace the power switch with an filtered module as per Michael Kellett’s suggestion in this thread.
  • bodge in a 0.4mH Common Mode Choke between the Power stage output and Control Stage input.
  • test voltages at various points of the circuit to compare with what the LTSpice simulation is reporting.  It may give me a clue as to where issues lie - perhaps I’ve mis-soldered a resistor or capacitor (shame these can’t be tested in-circuit.)

 

Why a filtered power module and Choke?  The frequency I was seeing the noise at seems to range from 60kHz to 130kHz and the datasheet indicates this would attenuate; I’m wondering if some noise is coming in through the power lead; I’m also wondering if this thing switching is potentially introducing noise on other equipment which I need to deal with.  I may have grasped the wrong end of the stick here completely though

 

If anyone has any other suggestions then I’m really open to hearing about them.  I’ve come a long way and I feel so close - It’s a bit disheartening if I’m honest: it all seemed to be going so well!

 

Follow on results I’ll post as a comment.

 

Next: Part Twelve - Design revisited: reworking the layout and PCB

Back: Part Ten - The Control Stage and Initial Functional Testing

Attachments:
imageSchematic.pdf
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Top Comments

  • three-phase
    three-phase over 6 years ago +4
    Some interesting test results you have shared with us. Some of my thoughts..... Did you measure what the voltage was at the rectifier with the 5Ohm resistor attached, are you dropping volts there that…
  • Andrew J
    Andrew J over 6 years ago in reply to genebren +4
    Thanks for the encouragement, I’m not giving up yet - too many ideas for improvements that I want to make in v2! The MOSFET I’ve used is definitely suspect and I’m looking at ways of providing a direct…
  • jc2048
    jc2048 over 6 years ago +4
    Hello Andrew, Having now looked at your schematic and their design article [I'm doing this all backwards!], here are a few quick observations. In the context of their circuit (I found your schematic confusing…
Parents
  • jc2048
    jc2048 over 6 years ago

    Hello Andrew,

     

    Having now looked at your schematic and their design article [I'm doing this all backwards!], here are a few quick observations.

     

    In the context of their circuit (I found your schematic confusing), the feedback circuit looks reasonable. Do you understand, from your simulating, how that tracks the converter output so that it's just above the linear regulator outputs or would you like me to talk you through it? (Understanding it is useful because you could then [temporarily] modify it to give more headroom for experimenting with the circuit - always keeping in mind the dissipation of the linear regulators, of course.)

     

    The converter you've substituted operates at a much lower switching frequency - theirs is 700kHz and yours is 200kHz. That will have an effect from the point of view of the ripple (higher) and the control side (the voltage loop control bandwidth is consequently much lower - so it will respond to changes at the Vf input much more slowly).

     

    A second obvious difference is the reference voltage (yours is higher at 1.2V - theirs 0.97V). Curiously, because of the way this all operates, that isn't too much of a problem - it just gives a small amount more of headroom which, if anything, is probably helping you a little.

     

    There's also an odd quirk (look at the graph called 'Frequency vs Feedback Voltage' in the datasheet) where it shows the frequency dropping when Vf is low. (May not matter, but it's the kind of thing to keep in the back of your mind, just in case.) It could be part of the explanation for why you're seeing the 100kHz switching frequency.

     

    Loop stability, once you move away from recommended circuits and simple, resistive, potential-divider feedback, is difficult with a switcher because of a) the mix of analogue and PWM making analysis difficult anyway and b) they probably don't tell you all you need to know about what goes on inside the chip. It was easy for the LT engineers because they have to understand it intimately to design the chips in the first place. You may well be lucky and it may all be unconditionally stable. If not, you'll need to experiment with it. Keep it in the back of your mind as a possible cause of problems.

     

    The capacitors, the one on the transistor emitter and the one you've got at the Vf input, look to me to have been intended as noise filters to reduce high frequency noise rather than modify the loop response.

     

    The trickiest situation would seem, to me at least, to be when the output load changes. The linear regulators will counter that change fairly quickly but the poor old converter will just trudge along slowly behind and there's then a real risk the regulators run out of headroom as the capacitor on the output of the dc-dc converter discharges before it can be replenished. Perhaps try switching your load resistors with a logic-level MOSFET with the gate driven from an Arduino, or something like that, and see how the linear regulators and the dc-dc converter respond to the load going on and off. You should be able to work out what's going on from the scope traces if you probe around. [Perhaps, for experiemnting, you could make the headroom variable (with a pot), rather than the fixed 1.7V or whatever it currently is.]

     

    As far as noise goes, you need to think differently about the switching ripple noise and the switching spike noise. The ripple comes from two things: indirectly, the coil current ramping up and down (a natural part of the converter operation) converted to a voltage by the ESR of the output capacitor(s) and, directly, the output capacitor(s) voltage as it charges and discharges. The linear regulators will remove much of that.

     

    The spikes come from the very rapid changes at the switching node when the switching takes place and are difficult to deal with once you've generated them. The very fast edges will have frequency components that are radio frequency signals and they'll readily skip around through quite small parasitic or intrinsic capacitances. If you've got some clip-on ferrites, you might experiment with passing the output wires from your board (ground as well as the Vout) through one and see if that helps reduce it a bit. Keep the wires coming out away from those going in or you'll get some capacitive coupling across, reducing the effectiveness.

     

    Quick observations he says, and then writes an essay! Hopefully there's something in that lot that helps.

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  • Andrew J
    Andrew J over 6 years ago in reply to jc2048

    Thanks for the feedback Jon, that's really useful and appreciated - and essays are good, sorry for responding with one of my own.

     

    I've been mulling over a few things since Sunday:

    • The feedback circuit: I’m no stick in the mud - if a common refrain is “something up with the feedback?” from you and Shabaz (and a couple of other people who haven’t even seen the circuit) I think that perhaps there is indeed “something up with the feedback”!
    • The ground plane: I think I’ve got this hideously wrong and I’m coupling noise from the switching circuit into the rest of the control circuit.  This is just something I was thinking about and have been researching.

    I thought I understood what the feedback circuit is doing but I've been mulling over the data sheets again and in trying to articulate it here, it doesn't add up in my head - I can't see how it operates to reach the 1.7v difference, sorry.  Essentially, it is 'programming' a different output voltage for the LTC1624 as the load voltage changes.  I had thought the two 100K resistors were providing a voltage to the PNP transistor approximately half way between the output voltage from the inductor (switching circuit) and the load voltage.  The 1K resistor is reducing the voltage from the inductor to just enough to turn the PNP on and allow enough of a current to flow over the 5K resistor to tune the voltage to the feedback pin.  That is being internally referenced to balance the output of the LTC1624 such that it adjusts the current to the Inductor so it remains in balance with the output current.  That naturally adjusts the voltage to allow for that balance to occur.  I guess I took it for granted because looking at the simulation in more detail, I can't work the maths out,

     

    If I look at the ground plane I have - first image is bottom layer with silk screen; second is the top layer - I kept the power ground separate (as the datasheet said) but I'm thinking that the way I've laid this out is contributing to the problem.  You can see where the net tie is (circled), so path to ground for the switching circuitry is underneath the rest of the control circuitry but is also mixed on the top layer as well.

    imageimage

    I'm now thinking I should have done the following (replicated on the top layer), and tying in multiple places:

    image

    Next Monday, I'm meeting up with a colleague who is bringing along a DC load so we can see more of what is going on and what happens as the load varies.  It always struck me that to build a power supply, one could do with a DC load, but to build a DC load, one needs a power supply - I didn't want to buy either!

     

    A few other thoughts I've been mulling over the last couple of days:

    • is the voltage to the Linear Regulators imbalanced such that one isn’t able to provide enough current - i.e. both equally up to 1.5A each?  Clearly getting the trace from the Inductor output to reach the Vin pin of each LT3081 over a precise, equal distance is difficult (I’m thinking of this in the same was as provisioning power in a star layout.)  If that was the case, it could be acting as a current limiter such that there is enough headroom for 15V/10Ohm but not enough for 15V/5Ohm so the voltage is drooping. 
    • In soldering the Schottky incorrectly, blowing up the Mosfet and sense resistor was a primary result but perhaps it’s damaged the LTC1624 as well.  I’m not really convincing myself on that though.  From what you have written here, the likely thing is that the feedback circuit isn’t operating fast enough - it’s as subject to the ripple out of the inductor as the rest of the circuit, although simulation does show its minimum level is > 1V.  As a rhetorical question, is there a simple resistor divider feedback that can track the output?  The key thing is to either (a) set it up to provide the 15V full time and let it drop over the Linear Regulators and deal with the power dissipation; or (b) find a mechanism to have the LTC1624 output  follow the load output.
    • Along with the ground plane, have I laid out the switching circuit properly?  The datasheet use nice relative terms such as ‘close’ but what does that mean in practice?  It’s not helpful that it relates this to both pins on diagonally opposite points of the chip - if you look at the sizes of D1, L1 Q1, C10 and R2 all which need to be 'close' to pins 4 and 8 of U1!
    • Given what you say, perhaps there is a faster part available.
    • 50uH Inductor and a 0.033Ohm sense resistor: from the LTC1624 datasheet, Rsense value is chosen based on Imax - it’s not clear from the wording what they actually mean by Imax (the grammar is confusing to me), but I’ve taken it to mean the maximum output current I want, i.e. 3A.  That would give a sense resistor of 100mV/3 = 0.033Ohms; the choice of inductor is based on ‘ripple current’: lower inductor value, higher ripple.  So in my calculation a 0.033 Ohm sense resistor with 50uH seemed like the way to go but resulted in a LT Spice simulation output that was unstable compared to using a 0.010Ohm and 10uH.   I assumed there was something going on with the inductor that I didn’t understand - and given they were values used in the LT application notes that’s what I went with. 

     

    What I will do is take a few more measurements around the feedback circuit and the linear regulators.  In particular see if the feedback is dropping too low and adjusting the frequency - although if the feedback voltage is too low, wouldn't that affect the output voltage - actually, potentially what is happening with the 5 Ohm resistive load?  One of the issues I'm finding is that probing the circuit can actually have quite an impact on the what is measured.  And trying to probe that LTC1624 chip is proving difficult with a spring mounted ground pin on the probe that has a tendency to 'ping' around!  I've already blown the sense resistor.

     

    I'd appreciate if you could clarify the feedback circuit in some more detail.  I'll post up more results as I get them and decide what to do.

     

    It would be a shame if this just can't work, especially as it works great in LT Spice (real live vs simulation!)  If I could get a bit more confidence it could work, it might be worth taking another look at the PCB, adding some test points, and rebuilding it up.

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  • Andrew J
    Andrew J over 6 years ago in reply to three-phase

    The help on here is awesome and I can't thank everyone enough.

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  • jc2048
    jc2048 over 6 years ago in reply to Andrew J

    I'd appreciate if you could clarify the feedback circuit in some more detail.

    Here's how I would look at it. Depending on how much electronics you are familiar with, you might need to

    concentrate a little to follow it, but none of it is difficult and we can do it all in our heads without

    using a calculator. You do need to understand Ohm's Law and, ideally, have an idea of how a bipolar

    junction transistor works.

     

    Here's the feedback circuit reproduced from your schematic

     

     

    image

     

    The dc-dc controller has a voltage control loop that will try to adjust its output voltage so that the

    difference between Vfb and the internal reference voltage (1.2V) is zero. If Vfb is higher than the

    reference, the output will be reduced until they match. If Vfb is less than the reference, the output will

    increase until they match.

     

    If you were to connect the output directly to Vfb, then the output would end up the same as the reference

    voltage. If you had a potential divider made up of two equal value resistors, so that half the output

    voltage was fed back to Vfb, the output would be adjusted to twice the reference (2.4V). It's fairly easy

    to see how you could set it up to give whatever voltage you want with just a pair of resistors.

     

    That's how the controller would normally be used. In this case the feedback circuit works in a different

    way.

     

    To analyse the feedback circuit you've got, let's assume that the whole thing does actually function

    properly and the loop has settled with Vfb equal to the reference (1.2V). Working backwards through the

    feedback circuit, that means the voltage across the 5k resistor (R4) must be 1.2V. We could then use that

    to work out the current in the resistor, but we don't really need to - we simply observe that the current

    in the 5k collector resistor is going to be more or less the same as the current in the 1k emitter

    resistor R3. It's about 99.5% for the transistor you've got there, but that's close enough to 100% for

    this rough analysis. [That comes from the basics of how a BJT works.] The voltage dropped by the 1k will

    be a fifth of that dropped by the 5k. A fifth of 1.2V is 240mV. The voltage across the top 100k resistor

    R5 must then be the 240mV plus the Vbe drop of the transistor. That drop will vary with base current, but

    let's go for 0.6V. That makes the voltage across the top 100k resistor 840mV. If there were no base

    current, the voltage across the other 100k resistor R6 would also be 840mv [same current in both

    resistors], giving 1.68V across the pair from the dc-dc converter output to the linear regulator output.

    In practice the voltage across that bottom resistor will be higher than that because it carries not just

    the same current as the top resistor but also the base current, so in the circuit I would imagine that

    you're seeing more than the 1.7V my rough analysis suggests.

     

    Having followed it through in reverse, it becomes quite easy to see what happens in the forward direction

    as the voltages at the dc-dc converter output and the linear regulator outputs vary.

     

    If the difference between the two increases then the voltage across R5 increases, that increases the

    voltage across R3, the current through R3 goes up, the current through R4 goes up, and so the voltage

    across R4 (which is also Vfb) increases above the reference voltage. The converter will then reduce its

    output and that should result in the difference going down.

     

    Conversely, if the difference goes down, Vfb will fall below the reference voltage and the converter

    should increase its output to increase the difference again.

     

    So the feedback acts to maintain the difference. It doesn't matter what the absolute value of the DC-DC

    converter output is because of the way the transistor behaves - the transistor doesn't mind what its

    collector voltage is, it will just keep the same current flowing in R4 as R3.

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  • Andrew J
    Andrew J over 6 years ago in reply to jc2048

    Thanks Jon, that's very useful and I can follow that easy enough.  When you mention 1.2V as the reference do you mean 1.19V or 1.28V?  The former seems more tied in to the adjustment of output (through the Error Amplifier), but the latter is how the functional diagram is shown with the OV comparator as per your sketch - but seems to be used to limit transient overshoots (1.19V + 7% = 1.28V).  I'm assuming you are rounding 1.19V for ease. 

     

    I don't want to change my circuit physically just yet - a colleague is bringing a DC load on Monday to try out and I want to make sure its working (he's bringing it from Yorkshire!).  Having blown Arduino analog pins yesterday I'm now unsure of the state of either the LTC1624 (from the incorrectly soldered Schottky which blew, at least, the Mosfet and sense resistor) nor the LT3081s.

     

    What I have been doing is playing around with the feedback circuit in LTSpice and I can stablise the Vfb significantly - keeping it at 1.19V:

     

    image

    Before (compare to measured actual in my comment below which changes from 696mV to 1.46V):

    image

    Whether or not it improves things in reality is anyone's guess until I try it: Vout is stable in both setups so I can't really trust the simulation but I have nothing else to go on.  However, my thinking is that if the feedback isn't stable around the reference voltage of 1.19V (1.2V) then it's going to struggle with ith-run and compensating the output.

     

    image

    The changes that make the most improvements are re-routing C6 and adding C4 (this is the LT Spice circuit NOT the schematic!).  I have also set the ESR value for C8 to 0.028 Ohms (I can get a replacement cap with that value at 100kHz which if I've understood correctly would be better at a higher frequency) - the data sheet for the existing one doesn't state the ESR but judging from its tan-theta at 100Hz, it's almost certainly too high.  Changing the Inductor to 50uH makes a much smaller improvement.  I've already physically tried a 0.1uF capacitor alongside C8 but it made no discernible difference.

     

    Ultimately, I will need to re-layout the board as well, change grounding and so on.  But the above changes are readily implementable so I could see the impact of the changes first to make a judgement call.

     

    Do you think perhaps I'm flogging a dead horse with this feedback circuit and this Switching Regulator?  If so, I can head back to the drawing board and try and work out a different approach.

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  • jc2048
    jc2048 over 6 years ago in reply to Andrew J

    When you mention 1.2V as the reference do you mean 1.19V or 1.28V?

    I meant 1.19V. [They were obviously trying for 1.2V, missed slightly, and I'm being polite and pretending they hit their target.] 1.2V is very common and you'll see it a lot - it must be something to do with what's possible in a chip with a bandgap reference. The partial diff amp I drew is the one marked EA on their functional drawing - it's what is generating the error term.

     

    The [controller] compensation doesn't roll things off quite as fast as I would have expected (assuming I'm simulating it right - I'm a bit confused by the additional bits and bobs hanging on the output of the transconductance error amplifier) - it looks like it's about 40kHz or 50kHz before the gain is down to its minimum value. [The internal compensation comes from the Cc capacitor and Rc resistor.]

     

    Be careful of how much capacitance you add in the feedback circuit - too much and the dominant pole of the controller compensation won't necessarily be dominant anymore.

     

    The feedback circuit is an amplifier with a gain of 2.5 (the potential divider at the base is a gain of 0.5 and the ratio of collector resistor to emitter resistor is 5, giving 2.5 overall). You might experiment with lowering the gain a bit to give the curve a lower slope. That might help with not running into the overvoltage comparator or, the other way, having the clock slow down.

     

    There's an offset because of the Vbe. That may, possibly, be beneficial - I haven't looked at it carefully. If you wanted to remove it partially, you could add a diode in series with R5 to counter it - only partial cancellation because the current is lower.

     

    How did you arrive at a value of 100uF for the output capacitor? [If you've got some spare ones, it would be quite easy to add a couple more if you scraped away resist. That would divide the ESR in three and triple the capacitance (roughly). Might be an interesting experiment to try.]

    Do you think perhaps I'm flogging a dead horse with this feedback circuit and this Switching Regulator?  If so, I can head back to the drawing board and try and work out a different approach.

     

    I suspect you may end up needing to give it more headroom than the original, in order to get around the problems that this controller has introduced, so you might find the regulator dissipation becoming an issue. It also depends on what you want it to do - were you hoping to control it from the microcontroller so that it works as a fast (variable) voltage source? Or is the output essentially static and just needs to respond quickly to load changes?

     

    I think the different behaviour when it comes up is possibly the regulators catching up with the controller more quickly in your case than the original. But the way it dips in both cases isn't very nice for a PSU.

     

    What are you going to be using it for? The last page of their design article shows the noise. They say it's good "for a mixed-mode" device. Whether that's true, I've got no idea, but it's poor compared to even a cheap analogue supply. They haven't made much attempt to deal with the high-frequency spike noise other than what comes from doing a reasonable layout. So you've got work to do there if you want it for powering sensitive analogue stuff (it would be fine for anything you'd normally power from a switching supply, obviously).

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  • Andrew J
    Andrew J over 6 years ago in reply to jc2048

    Thanks Jon - I did think you meant the error amplifier but the way you drew it I just wanted to check!

     

    As for the output caps, it was really based on the existing schematic and the simulation on LTSpice.  I neglected to choose low ESR ones for the input and output capacitors.  Calculating ESR from tan-theta for these at 100Hz (so meh!) gives ESR of around 1.5Ohms.

     

    I had seen the noise graph - naively I thought I could do better given the LTSpice simulation.  Where I'm getting to know is not dissimilar: see my follow on comment at the end of this thread where I've made a bit of progress. 

     

    I had intended the project to be a learning exercise and to end up with a useful bench power supply.  As I said at the beginning, I'm right at the edge of my comfort zone (actually, fallen off the cliff now but I haven't hit the bottom yet!) so I expected to learn a fair bit and it is absolutely achieving that goal.  If I end up with something restricted in use then I guess so be it, but I haven't finished yet.  There's optimism for you image 

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  • Andrew J
    Andrew J over 6 years ago in reply to jc2048

    Thanks Jon - I did think you meant the error amplifier but the way you drew it I just wanted to check!

     

    As for the output caps, it was really based on the existing schematic and the simulation on LTSpice.  I neglected to choose low ESR ones for the input and output capacitors.  Calculating ESR from tan-theta for these at 100Hz (so meh!) gives ESR of around 1.5Ohms.

     

    I had seen the noise graph - naively I thought I could do better given the LTSpice simulation.  Where I'm getting to know is not dissimilar: see my follow on comment at the end of this thread where I've made a bit of progress. 

     

    I had intended the project to be a learning exercise and to end up with a useful bench power supply.  As I said at the beginning, I'm right at the edge of my comfort zone (actually, fallen off the cliff now but I haven't hit the bottom yet!) so I expected to learn a fair bit and it is absolutely achieving that goal.  If I end up with something restricted in use then I guess so be it, but I haven't finished yet.  There's optimism for you image 

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