Parallella $99 board now open hardware on Github

Although Adapteva are still fulfilling their Kickstarter committment, their shop is already open for preorders of the 16-core Epiphany board for November delivery.  Three options appear to be available:

If "No GPIO" means none, zero, zilch, that doesn't appear very enticing, I must say.  If this describes the situation accurately, the range of application of the basic board will be a lot narrower than expected.  And if the Zynq-7020-based Parallella-16 costs $199, then the price of the Parallella-64 is probably going to be very unfriendly.

Morgaine Dinova wrote:

 

If "No GPIO" means none, zero, zilch, that doesn't appear very enticing, I must say.  If this describes the situation accurately, the range of application of the basic board will be a lot narrower than expected.  And if the Zynq-7020-based Parallella-16 costs $199, then the price of the Parallella-64 is probably going to be very unfriendly.

Given there's an 'optional upgrade' for the GPIO connectors it seems likely that the difference is simply down to installing the connectors.  Any volunteers to hand solder four of those ?

In some ways you can see the reasoning, not having them will not prevent you doing software things on the Epiphany processor.  If you really want gpio, and don't care so much about the Epiphany there are probably better boards.

Am I correct in thinking that the only difference between the 7010 and 7020 is more FPGA space ?  If so, what's this board really meant to be, a dev board for parallel processing on the Epiphany, or an FPGA dev board ?

selsinork wrote:

 

what's this board really meant to be, a dev board for parallel processing on the Epiphany, or an FPGA dev board ?

If Adapteva had asked themselves that question very clearly and seriously, I suspect that Parallella would have a very different design and a very different cost.  As it stands, the main effect of the board will be to promote the Zynq range to a far greater number of people than Xilinx would normally expect, but to a far smaller number of people than Adapteva would like as an audience for Epiphany.

It's a design from heaven ... for Xilinx.

I agree that the choice of Zynq seems a bit odd - is it that the Epiphany chip is not seriously useable with out the support of a 'big' ARM processor and  an FPGA to glue them together.

I just had  a quick look on their website and it seemed that all theri applications diagrams showed the Epiphany connectedd to an FPGA.

MK

Morgaine Dinova wrote:

 

As it stands, the main effect of the board will be to promote the Zynq range to a far greater number of people than Xilinx would normally expect, but to a far smaller number of people than Adapteva would like as an audience for Epiphany.

My feeling was always that Epiphany would have a very small audience. Both the RPi and BBB have shown there's a market for a low priced board, but that a large section of the buyers are thinking 'media center'.

Price wise, $99 doesn't compare well. The circuitco page is showing 74020 BBB shipped as of today.  So you have to wonder if the Parallella can ship enough to get to Michaels prices for 100K Zynq devices. Maybe they can, or maybe Xilinx have given them a good deal up-front, but either way I feel you're right and the Zynq will end up overshadowing the Epiphany.

selsinork wrote:

 

Price wise, $99 doesn't compare well. The circuitco page is showing 74020 BBB shipped as of today.  So you have to wonder if the Parallella can ship enough to get to Michaels prices for 100K Zynq devices. Maybe they can, or maybe Xilinx have given them a good deal up-front, but either way I feel you're right and the Zynq will end up overshadowing the Epiphany.

Whereas if Adapteva had mounted the Epiphany on a barebones Arduino shield or BeagleBone cape or Pi plate with minimal glue logic, the board could have ridden the huge wave of established ARM and AVR enthusiast communities and at Pi-type prices.  This seems clear from our ballpark cost examination above.

Note that if 100k volumes would make Zynq prices plummet, they would do the same to the cost of the Epiphany chip, and so the price imbalance would remain.  Volume does not change the overall picture of a fundamentally misplaced choice of host pairing.  And with the greater volumes, Adapteva would even be making a profit in this early experimental phase, instead of having to pay the bulk of proceeds from sales to Xilinx.

Just imagine if the Pi or BBB contained an additional component that is many times as expensive as their main SoCs.  The "Pi price niche" would not have materialized, and hence neither would have the enthusiastic mass adoption of Pi and the boards that followed it.  Adapteva may have made a big mistake.

Michael Kellett wrote:

 

is it that the Epiphany chip is not seriously useable with out the support of a 'big' ARM processor and  an FPGA to glue them together.

Epiphany has no dependency on its host processor except as a means of downloading code to it and then supplying the data for that code to process.  The Epiphany cores have neither instruction set nor architectural similarity to ARM and can work well with any host system that can supply the code and data sufficiently quickly.  There is no single definition for "sufficiently quickly" here --- in parallel programming, that is always going to be application-dependent.

The Zynq's two Cortex-A9 cores are each not hugely faster than our BBB's Cortex-A8, and they're being clocked at only 800MHz according to the Parallella Gen-1 Reference manual so computationally they're each pretty much in the same speed ballpark as the BBB's single core.  In other words, the Zynq's ARM is not providing any significant speed advantage over much cheaper devices, at least per core.  Presumably both cores can feed the Epiphany simultaneously, and if so then there is a throughput advantage gained by using a dual-core ARM over a single-core device.  There is no shortage of multi-core ARMs these days though, and most of them probably cheaper than the Zynq because they're made for the consumer market.  (*)

The host CPU(s) aside, there is also the question of interfacing to the Epiphany.  I expect that the reason why Adapteva have chosen to interface through an FPGA is because they haven't yet tied down the optimum way in which to interface to Epiphany.  After all, if they knew this already then there would be no need to use programmable logic and the extra costs associated with it.  Choosing a host SoC that combines ARM and FPGA looks like an ideal combination for their purposes, but this is true only if the cost of combining the two functions doesn't adversely affect the desired goal of bringing Epiphany into widescale use.  It seems to me that the Xilinx device is doing exactly that, because its huge price must be limiting Epiphany uptake.

The FPGA design files have been made available by Adapteva so we'll be able to see what the interfacing requirements of Epiphany really are --- see the quite detailed "Parallella Platform Reference Design" white paper which also includes a (broken) link to the HDL, now available here.  Given that knowledge, I bet that a much more cost-effective host design can be found, one that can bring Epiphany to a far wider audience, more cores at a given price, and higher profits for Adapteva through focusing more strongly on their own chips rather than on costly distractions.

===

(*) Addendum:  For example, the unit price of the dual-core Allwinner A20 is 12 euro from Olimex, and 9.60 for 50+.

The Epiphany is a sort of co-processor - it doesn't have peripherals of its own so it's always likely to need glue logic to fit it into a system that does anything useful. The really nice thing about the Zynq is the tightness and quality of the coupling between the FPGA and the ARM cores - nothing else (that I know of) comes close. So if you want the Epiphany to do the hard work for an ARM the Zynq is about the best solution on offer (in terms of performance) so it's a reasonable choice if the main goal is to show off the E at it's best.

The problem with a great many low cost ARM (and other) processors (the Broadcom and Allwinner A20s included) is that they don't offer low latency high bandwidth data paths in and out of the core. You might get sata, pcie etc with quite reasonable bandwidth but awful latency.

So if you want the Epiphany to do a lot of talking back and forth with the rest of the system you'll need an FPGA and if you want that to communicate well with the processor the Zynq is as good as it gets.

The A20 at about £8 with a £10 fpga isnt going to be a lot cheaper than the Zynq but the performance will be a lot worse.

So having thought about a bit more I think the Zynq does make sense - it lets their board address the widest range of applications and probably will enable them to demonstrate just how fast their chip can go.

MK

selsinork wrote:

 

Am I correct in thinking that the only difference between the 7010 and 7020 is more FPGA space ?  If so, what's this board really meant to be, a dev board for parallel processing on the Epiphany, or an FPGA dev board ?

The main difference between the 7010 and 7020 is size of FPGA fabric, but it's pretty significant:

28K versus 85K logic cells = approx 430K versus 1.3M "gates".

240KB versus 560KB internal block SRAM.  If it's like the Spartan-3A block RAM, we're talking very high speed dual-port with data width configurable between 36 and 2 bits for each port.

80 versus 220 DSP slices with 18x25 bit MACs.  Peak DSP performance on Symmetric FIR is 58 versus 158 GMACS.

Also, the 7010 is limited to 100 I/Os versus the 7020's 200 (I think the CLG400 package is limited to 120 I/Os).

This is a serious computing engine, which can be used for high-performance image pre- and post-filtering to share the load with the Epiphany chip.

I'm actually quite amused (not ROFL -- more like rocking back and forth holding my knees chuckling) at the idea that US$99 is expensive for a Zynq board in 2013.  Parallella was originally prototyped with a 7020-based ZedBoard, which is still US$395 (US$319 for academics).  [FYI: ZedBoard is now 1 year old and has sold over 3,000 units.]  There's now a 7010-based MicroZed board for US$199.   IMO getting the cost with Epiphany down to US$99 is pretty impressive, even if that's pre-order pricing.

Edit:  Answering the second question, I think it's clear that the Parallella is for making effective use of Epiphany, and Zynq is simply a great way to do the control processor and glue logic, with a bunch of DSP and high-speed SRAM buffering tossed in for free.  To me it's obvious that the Parallella guys didn't want to waste a lot of time futzing around with FPGAs and ARM processors, so (1) get it working with ZedBoard, and (2) adapt the design as quickly and safely as possible to a small board.

Speaking of board size, IMO the only practical way to get a large ARM chip with high-bandwidth connection to a large FPGA on a board that small with DRAM and Epiphany is using Zynq or a similar product from Altera.

Sure, one could make a cheaper board if the volumes were there, but that's pretty unlikely.  Plus, if the volumes do somehow arise, Parallella will enjoy the same market with the advantage of being there first.

selsinork wrote:

 

Am I correct in thinking that the only difference between the 7010 and 7020 is more FPGA space ?  If so, what's this board really meant to be, a dev board for parallel processing on the Epiphany, or an FPGA dev board ?

The main difference between the 7010 and 7020 is size of FPGA fabric, but it's pretty significant:

28K versus 85K logic cells = approx 430K versus 1.3M "gates".

240KB versus 560KB internal block SRAM.  If it's like the Spartan-3A block RAM, we're talking very high speed dual-port with data width configurable between 36 and 2 bits for each port.

80 versus 220 DSP slices with 18x25 bit MACs.  Peak DSP performance on Symmetric FIR is 58 versus 158 GMACS.

Also, the 7010 is limited to 100 I/Os versus the 7020's 200 (I think the CLG400 package is limited to 120 I/Os).

This is a serious computing engine, which can be used for high-performance image pre- and post-filtering to share the load with the Epiphany chip.

I'm actually quite amused (not ROFL -- more like rocking back and forth holding my knees chuckling) at the idea that US$99 is expensive for a Zynq board in 2013.  Parallella was originally prototyped with a 7020-based ZedBoard, which is still US$395 (US$319 for academics).  [FYI: ZedBoard is now 1 year old and has sold over 3,000 units.]  There's now a 7010-based MicroZed board for US$199.   IMO getting the cost with Epiphany down to US$99 is pretty impressive, even if that's pre-order pricing.

Edit:  Answering the second question, I think it's clear that the Parallella is for making effective use of Epiphany, and Zynq is simply a great way to do the control processor and glue logic, with a bunch of DSP and high-speed SRAM buffering tossed in for free.  To me it's obvious that the Parallella guys didn't want to waste a lot of time futzing around with FPGAs and ARM processors, so (1) get it working with ZedBoard, and (2) adapt the design as quickly and safely as possible to a small board.

Speaking of board size, IMO the only practical way to get a large ARM chip with high-bandwidth connection to a large FPGA on a board that small with DRAM and Epiphany is using Zynq or a similar product from Altera.

Sure, one could make a cheaper board if the volumes were there, but that's pretty unlikely.  Plus, if the volumes do somehow arise, Parallella will enjoy the same market with the advantage of being there first.

John Beetem wrote:

 

I'm actually quite amused (not ROFL -- more like rocking back and forth holding my knees chuckling) at the idea that US$99 is expensive for a Zynq board in 2013.

That's where selsinork's excellent question from post #18 comes in:

selsinork wrote:

 

what's this board really meant to be, a dev board for parallel processing on the Epiphany, or an FPGA dev board ?

Well?  Sure, we like the idea of a Zynq board for $99, but that is most definitely not the point  for Adapteva.

(PS.  An FPGA board without GPIOs is usually about as useful as a bicycle to a fish except when used as a pure host accelerator, so more generally one should really say "a Zynq board for $119", the mid-price option that provides GPIOs since the $99 board does not.  It's sensible to say "an Epiphany board for $99" though, because the Epiphany array is fully and effectively usable even without the GPIO option.)

Morgaine Dinova wrote:

 

(PS.  An FPGA board without GPIOs is usually about as useful as a bicycle to a fish except when used as a pure host accelerator, so more generally one should really say "a Zynq board for $119", the mid-price option that provides GPIOs since the $99 board does not.  It's sensible to say "an Epiphany board for $99" though, because the Epiphany array is fully and effectively usable even without the GPIO option.)

The US$99 board gives me the option of using lower-cost GPIO connectors if I don't need the speed of the Parallella's usual Samtec BSH-030-01-FDA sockets, or I want other options.  Or I can just populate the one that's connected to Zynq and leave the others unpopulated, saving 75% of the part cost.  Always nice to have options.

John Beetem wrote:

 

The US$99 board gives me the option of using lower-cost GPIO connectors if I don't need the speed of the Parallella's usual Samtec BSH-030-01-FDA sockets, or I want other options.  Or I can just populate the one that's connected to Zynq and leave the others unpopulated, saving 75% of the part cost.  Always nice to have options.

Ah that's good to hear.  So it seems the "No GPIO" in the dropdown list for the $99 version doesn't really mean what it says, fortunately.  That's a relief, and I'm sure not only to me.

John Beetem wrote:

 

I'm actually quite amused (not ROFL -- more like rocking back and forth holding my knees chuckling) at the idea that US$99 is expensive for a Zynq board in 2013.  Parallella was originally prototyped with a 7020-based ZedBoard, which is still US$395 (US$319 for academics).  [FYI: ZedBoard is now 1 year old and has sold over 3,000 units.]  There's now a 7010-based MicroZed board for US$199.   IMO getting the cost with Epiphany down to US$99 is pretty impressive, even if that's pre-order pricing.

Digilent has announced a Zynq 7010-based board called ZYBO for US$149.  Much friendlier I/O than Parallella, including bidirectional HDMI, 16 bit/pixel VGA, 10/100/1G Ethernet, 512 MB DDR3, and five Digilent PMOD connectors for various I/O cards.  I don't think it has any high-density GPIO connectors, so if you need a lot of GPIO you're probably better off with a MicroZed.  It is nice to see Zynq boards coming down to a reasonable price range.

I suspect that Zynq will never have a reasonable price, meaning the price of mass-market Chinese SoCs.  Like Intel, Xilinx seems to believe that keeping prices sky-high is intrinsic to its self-respect and/or survival, and so the company is not playing the game described by that famous saying "The natural price of all semiconductors is the price of their packaging."

Morgaine Dinova wrote:

 

I suspect that Zynq will never have a reasonable price, meaning the price of mass-market Chinese SoCs.  Like Intel, Xilinx seems to believe that keeping prices sky-high is intrinsic to its self-respect and/or survival, and so the company is not playing the game described by that famous saying "The natural price of all semiconductors is the price of their packaging."

Xilinx prices on Spartan chips are very attractive IMO.  If you want to use the latest and greatest and highest performance Xilinx chips in big packages, prepare to pay big bucks.  I'm definitely not the target demographic for those chips.  If you wait a few years for them to get the kinks out of the process, you can get Spartans for great prices.  But it's hard to get down to the "price of the packaging" because an FPGA is essentially an SRAM array with some gates attached to it, and SRAM is pretty expensive.

I once nearly throttled a salesman who sold Xilinx chips because he said my designs obviously weren't very "sophisticated".  I held off because I realized that by "sophisticated", he meant designs that required fast, expensive Xilinx chips with high sales commissions.  He didn't mean "using every trick in the book and a few adapted from other books" to fit a complex function into a smallish, not particularly fast Spartan to save big bucks

John Beetem wrote:

 

Xilinx prices on Spartan chips are very attractive IMO.

The words "reasonable" (used earlier) and "attractive" as you've been using them are different to the way in which I prefer to use them.  What they mean to you appears to be "Less costly than I expected them to be", or perhaps "Less costly than they were before".  It has no bearing on their actual cost relative to the state of technology.

If people have gotten used to the latest iLust gadget costing $500, then with the above semantic a price drop to $300 would probably be described as making them "reasonable" or "attractive", despite the fact that it's still bloody extortionate when similar functionality is available for under $100.  Of course there's room for quibbling over quality, but in the case of digital semiconductors that excuse practically evaporates because digital technology without the required noise margins simply doesn't work.

I accept that Spartans can be purchased for not much more than the price of packaging, 3A's all the way down to single digit unit prices, but my comment was really aimed at Zynq, or should have been.

My argument about Zynq pricing would have been stronger if I could point to a native Chinese ARM+FPGA with similar functionality but a much lower price tag, but alas I can't, and I'm not even sure how to  start looking.  (And the documentation might not be in any language I understand anyway.)  Despite this weakness, my gut feeling is that Xilinx is making no effort to bring this family of devices to the mass market (which is entirely a function of price), despite having had ample time to do so since the concept was sprung on the world ages ago.  I think it likes to give this particular product an air of exclusivity (and charge accordingly), which is why it's so hard to find the device listed, priced and in stock.

Parallella seems to be very much an oddball, a product that democratizes Zynq despite Xilinx's best efforts at keeping it away from the unwashed masses.

Morgaine Dinova wrote:

 

John Beetem wrote:

 

Xilinx prices on Spartan chips are very attractive IMO.

 

The words "reasonable" (used earlier) and "attractive" as you've been using them are different to the way in which I prefer to use them.  What they mean to you appears to be "Less costly than I expected them to be", or perhaps "Less costly than they were before".  It has no bearing on their actual cost relative to the state of technology.

 

If people have gotten used to the latest iLust gadget costing $500, then with the above semantic a price drop to $300 would probably be described as making them "reasonable" or "attractive", despite the fact that it's still bloody extortionate when similar functionality is available for under $100.  Of course there's room for quibbling over quality, but in the case of digital semiconductors that excuse practically evaporates because digital technology without the required noise margins simply doesn't work.

 

I accept that Spartans can be purchased for not much more than the price of packaging, 3A's all the way down to single digit unit prices, but my comment was really aimed at Zynq, or should have been...

Well, the first marketing materials for Zynq said "starting at $15" [Xcell Journal 2Q2011] and maybe they'll get down there some day.  As far as comparing to iGewgaws, it's a question of volume.  A technology that sells 10M - 100M/year is going to be a lot cheaper than FPGAs, which rarely get into high-volume devices for the simple reason that if you're going to have high volumes you're better off synthesizing your Verilog/VHDL into a real ASIC.  FPGA proponents talk about "getting an FPGA into a cell phone", but the reality is that the margins aren't there and cell phones don't need the logic flexibility an FPGA offers.  Proponents say "but wait!  the FPGA is reconfigurable!" but IMO it's hard enough to get one design to work in an FPGA, much less a whole slew of them.  This would change if they'd open up the bitstream formats.

I'd be quite happy to get that $15 chip   Maybe someday.  It takes a long time for Xilinx parts to get cheaper, and usually you don't see much price movement on generation N until generation N+1 comes out.  Most of the stuff I read about Xilinx these days is about 3-D chip construction and other ways to make their chips more expensive.  Well, that's probably where they make their money, and Spartan is there because otherwise a competitor would take over the entry level, and then leverage themselves up.  As long as the Chinese stay away from FPGAs, I don't expect much change, and FPGAs haven't reached enough volume to get the Chinese interested.

Back to Zynq pricing, I guess I'm not sticker-shocked because my then-company looked into Virtex II-Pro a long time ago.  Our products were mostly based on PowerPC, so the idea of having PowerPC integrated with an FPGA seemed pretty good.  Then we saw the price tag, and quickly went with a cheap PowerPC SoC and a cheap  Spartan-IIE, interconnected with PCI.

Where FPGAs really stand out IMO is medium-volume applications where designing an ASIC is too expensive and too risky, but the design is not practical without a custom chip.  If it's a communication product where protocols may be evolving (or you need to add others in the future), the flexibility of an SRAM-based FPGA is an excellent match, since you can ship a new release of the hardware with each software release.  FPGA are also great for communication test equipment, where the protocols needed to be tested evolve and you'd like to minimize the effort of updating your equipment.  But it's a medium volume product, though with enough margin that current FPGA pricing is, well, pretty "attractive".

John Beetem wrote:

 

But it's a medium volume product, though with enough margin that current FPGA pricing is, well, pretty "attractive".

Grrrrrr ....

I wonder why in these discussions so many people overlook Lattice. Easily the most fun FPGA company and they DO have FPGAs in phones. Their Ultra Low Density approach fits well with John's definition of sophisticated and is currently delivering a million parts per day at very low (single $ or less) prices.

(MInor rant over -BTW I have no connection with Lattice other than as a customer).

Even though I don't use any Xilinx parts at the moment I think the cost/pricing issue is more complex than just the cost of the silicon. Xilinx (and I assume Altera) spend more on software development than on hardware development. They also spend huge sums on research which makes the mega parts possible. They have to get that back somehow and whilst both companies make a profit I don't think they do much better overall than, for example, Linear Technolgy and nothing like as well as Intel have done. (That's in term sof margins not size).

And much as I like Lattice their approach with simple cheap bits hasn't made them as big as X or A.

I think we'll see the FPGA market grow a lot more - the potential for cheap tiny parts is huge - but tiny is more about price and package - the capability is getting better all the time. I'm already able to get 1000 LUTs for £2 in 100s off but, I think, <<£1 for 100k. The next generation (Lattice 'X03) will expand tiny to cover 640 to 22k LUTs and at lower prices. The space for ASICs gets smaller with each advance of FPGAs - I don't play in the meg chip zone but there is a lot of scope with the cheapo parts.

Hmmm - this has got very off topic - sorry.

MK