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Related

Arduino: now a Single Board Computer!

fustini
fustini over 11 years ago

So I often get annoyed when folks refer to the AVR-based Arduino boards (or even the ARM microcontroller DUE) as a Single Board Computer.  The Yun blurred the lines a bit... but the news today from Maker Faire Rome has the Arduino brand fully in the SBC world now:

 

Arduino Announces new Boards and Collaboration with Intel and T.I.

http://makezine.com/2013/10/03/arduino-announces-two-new-linux-boards/

image

 

coder27 posted about the Intel-based Arduino board, and there is also an upcoming Arduino model based on the TI Sitara (same as in the BeagleBone Black - an ARM Cortex A8).

 

I just read an interview on Make with jkridner about the new Arduino TRE:

 

Talking to Jason Kridner About the new Arduino Tre

http://makezine.com/2013/10/03/talking-to-jason-kridner-about-the-new-arduino-tre/

"The focus is on simplicity. It isn’t just a BeagleBone split in the middle [...] If you know Linux, you’ll be able to come in that way. If you know Arduino, you’ll be able to use the AVR as the system master."

image

 

I'm not sure exactly what this all means, but it is exciting to have more SBC options and the Arduino brand will be an interesting influence on the SBC market.  I do know that I didn't need any coffee to feel wide awake this morning image

 

What is the feeling of our SBC discussion group here?

 

cheers,

drew

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  • morgaine
    morgaine over 11 years ago +1
    I like the term "bare metal microcontroller" to denote the processors on Arduino AVR and ARM Cortex-M class boards. These contrast strongly with those boards which are based on "application processors…
  • johnbeetem
    johnbeetem over 11 years ago +1
    I have no problem with this use of Single-Board Computer. The earliest SBCs had very simple processors like Intel 8080 or MOS Technology 6502, which didn't have MMUs and didn't address much memory. When…
  • morgaine
    morgaine over 11 years ago +1
    Drew, leaving aside the puzzling situation with Galileo and how it's managing to run its peculiar version of Yocto, the Arduino TRE looks very good indeed! In fact, over the last year and a half, haven…
Parents
  • morgaine
    morgaine over 11 years ago

    I like the term "bare metal microcontroller" to denote the processors on Arduino AVR and ARM Cortex-M class boards.  These contrast strongly with those boards which are based on "application processors" that have an MMU and therefore run full operating systems (mostly Linux) and so their applications execute as user-mode processes in virtual memory --- definitely not "bare metal".

     

    It provides a clear distinction and so keeps discussions from attempting to compare apples with orangutans.

     

    PS. It's appalling to see makezine.com make this elementary error though. image

     

    PPS.  The source of the error seems to be Intel themselves!

     

    Intel writes (in the FAQ):

     

    Q: Can I run Linux on IntelRegistered Galileo?

     

    A: Yes. IntelRegistered Galileo runs Linux* out of the box. It comes in two flavors; the default is a small Linux. If you add an SD card to your kit, you can add a more fully-featured Linux. Refer to the IntelRegistered Galileo Getting Started Guide and IntelRegistered Quark SoC X1000 IoT Development Kit Software GSG.

     

    I'm still figuring out exactly what this means, but at best it's going to be something like the old uClinux, which was pretty horrible at best.  After all there is no MMU in Quark to support the normal Linux kernel --- see the Quark datasheet.  (uClinux is effectively EOL now owing to MMUs having become so ubiquitous.)

     

    PPPS.  The Galileo Getting Started Guide refers only to Linux support on the host side, not on the board.

     

    PPPPS. Oh dear.  If you zoom into the image showing what they load from uSD card, it boots into:

     

    Poky 9.0 (Yocto Project 1.4 Reference Distro) 1.4.1 clanton /dev/ttyS1

     

    I've got a very bad feeling about this.  I thought the days of MMU-less "Linux" derivatives were over.

     

    ===

     

    IMPORTANT ADDENDUM:  Quark does have an MMU, it's just not mentioned in the SoC Datasheet.  See this post.

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  • fustini
    fustini over 11 years ago in reply to morgaine

    Woah, there's no MMU?!  I hadn't read much yet but was assuming it was similar to atom - some low power x86 chip.  I thought everything since 386 had protected mode - weird.  I guess I need to read some more of the flurry of coverage from today.  Good catch.... I will add to my personal defination that SBC must have MMU image

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  • Former Member
    Former Member over 11 years ago in reply to fustini

    Woah, there's no MMU?!  I hadn't read much yet but was assuming it was similar to atom - some low power x86 chip.

    I assumed the same thing.  It's described as a Pentium, and Pentiums have MMUs.

    The IntelRegistered Quark Core Developer's Manual, section 3.3.1 "Address Spaces" says:

    https://communities.intel.com/servlet/JiveServlet/previewBody/21826-102-2-25118/Intel%20Quark%20Core_DevMan_001.pdf

     

    The IntelRegistered Quark SoC X1000 Core has three distinct address spaces: logical, linear, and

    physical. A logical address (also known as a virtual address) consists of a selector and

    an offset. A selector is the contents of a segment register. An offset is formed by

    summing all of the addressing components (BASE, INDEX, DISPLACEMENT) discussed

    in Section 3.5.3 into an effective address. Because each task on the IntelRegistered Quark SoC

    X1000 Core has a maximum of 16 K (214 - 1) selectors, and offsets can be 4 Gbytes

    (232 bits), this gives a total of 246 bits or 64 terabytes of logical address space per task.

    The programmer sees this virtual address space.

     

    The segmentation unit translates the logical address space into a 32-bit linear address

    space. If the paging unit is not enabled then the 32-bit linear address corresponds to

    the physical address. The paging unit translates the linear address space into the

    physical address space. The physical address is what appears on the address pins.

     

    This sounds like it is doing at least some sort of MMU function in translating virtual addresses

    to physical addresses.

     

    The FAQ, says under "What development operating systems are supported" at

    http://www.intel.com/support/galileo/faq.htm

    • Linux Ubuntu 12.04* (32-bit & 64-bit)
    • Mac OS X version 10.8.5* (also tested on Mac OS X 10.6.8, 10.7.5, and 10.9* developer preview)
    • Windows 7* (32-bit & 64-bit) and Windows 8*

    I had initially understood that to mean supported on the Galileo, although the 64-bit versions

    made no sense, and running Windows 7 in 256MB doesn't sound reasonable. 

    Now I'm reading that as those OSs are supported on host computers connected to Galileo,

    so it's not clear at all what OSs are supported on Galileo.

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  • morgaine
    morgaine over 11 years ago in reply to Former Member

    Walt Gribben has just confirmed the existence of an MMU in our sister thread:

     

    Walt Gribben wrote:

     

    theres one big piece of Quark that has been overlooked.  Having worked with Intel architectures for some time now, I'm familiar with the way they write their manuals.  And what isn't there is always more important that what is!

    Actually, Quark does have an MMU, its just not described in the Datasheet.

    The MMU is part of the CPU Core, which is described the Core Hardware Reference Manual and the Core Developer's Manual.   The Quark CPU Core is a complete IA32 implementation,  a little slow but with a few extras for the embedded micro market.  Check out page 20 of the hardware ref, it shows a block diagram of the core.  The three manuals together make up the Quark documentation.  You almost need a monitor for the datasheet, the hardware ref manual printed out and a second monitor for the developers manual to make sense of it all. image

     

    This changes everything, so:

     

    1. Quark does after all have an MMU.
    2. Having an MMU, it is validly called an applications processor.
    3. Having an MMU, it can run full operating systems like Linux with full virtual memory abstraction.
    4. Having an MMU, it does not need to run uClinux (which is for MMU-less microcontrollers).

     

    Phew! image  And once again, thanks Walt!

     

    I'm very glad to hear that!  Things were looking pretty ugly there for a while ...

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  • morgaine
    morgaine over 11 years ago in reply to fustini

    Drew Fustini wrote:

     

    I will add to my personal defination that SBC must have MMU image

    You'll be relieved to hear (as I was) that the Quark has one after all, just cloaked in stealth marketing. image

     

    The only remaining worry is the harsh and totally non-open licensing on Intel's software downloads.  That however must be a mistake, because they're not allowed to impose such additional restrictions on top of GPL-licensed software.  It'll probably be removed or changed very rapidly once it's pointed out to them.

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  • morgaine
    morgaine over 11 years ago in reply to fustini

    Drew Fustini wrote:

     

    I will add to my personal defination that SBC must have MMU image

    You'll be relieved to hear (as I was) that the Quark has one after all, just cloaked in stealth marketing. image

     

    The only remaining worry is the harsh and totally non-open licensing on Intel's software downloads.  That however must be a mistake, because they're not allowed to impose such additional restrictions on top of GPL-licensed software.  It'll probably be removed or changed very rapidly once it's pointed out to them.

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