Arduino: now a Single Board Computer!

I like the term "bare metal microcontroller" to denote the processors on Arduino AVR and ARM Cortex-M class boards.  These contrast strongly with those boards which are based on "application processors" that have an MMU and therefore run full operating systems (mostly Linux) and so their applications execute as user-mode processes in virtual memory --- definitely not "bare metal".

It provides a clear distinction and so keeps discussions from attempting to compare apples with orangutans.

PS. It's appalling to see makezine.com make this elementary error though.

PPS.  The source of the error seems to be Intel themselves!

Intel writes (in the FAQ):

 

Q: Can I run Linux on Intel Galileo?

 

A: Yes. Intel Galileo runs Linux* out of the box. It comes in two flavors; the default is a small Linux. If you add an SD card to your kit, you can add a more fully-featured Linux. Refer to the Intel Galileo Getting Started Guide and Intel Quark SoC X1000 IoT Development Kit Software GSG.

I'm still figuring out exactly what this means, but at best it's going to be something like the old uClinux, which was pretty horrible at best.  After all there is no MMU in Quark to support the normal Linux kernel --- see the Quark datasheet.  (uClinux is effectively EOL now owing to MMUs having become so ubiquitous.)

PPPS.  The Galileo Getting Started Guide refers only to Linux support on the host side, not on the board.

PPPPS. Oh dear.  If you zoom into the image showing what they load from uSD card, it boots into:

Poky 9.0 (Yocto Project 1.4 Reference Distro) 1.4.1 clanton /dev/ttyS1

I've got a very bad feeling about this.  I thought the days of MMU-less "Linux" derivatives were over.

===

IMPORTANT ADDENDUM:  Quark does have an MMU, it's just not mentioned in the SoC Datasheet.  See this post.

The Quark datasheet is singularly unhelpful as to the processor's capabilities because only 1 page giving a 10 bullet-point list is devoted to the processor core. The datasheet is far more concerned with the integrated peripheral devices and other matters unique to this SoC. However you can infer that the processor has paging because the list says that Execute-Disable Page Protecton is supported. Also, as it says it's a Pentium and as all Pentiums have protected mode, it's reasonable to infer that it has the same memory management as any other modern x86 processor.

If you read the Developer's Manual or Hardware Reference Manual it becomes crystal clear that the processor core is a full-feature x86 processor containing all the protected mode / paging features you would expect (and which have been in all x86 processors since the 386).

Jeremy Barker wrote:

 

If you read the Developer's Manual or Hardware Reference Manual it becomes crystal clear that the processor core is a full-feature x86 processor containing all the protected mode / paging features you would expect (and which have been in all x86 processors since the 386).

And if you read the whole thread then you'd realize that the Developer's Manual and Hardware Reference Manual didn't come to our attention until Walt Gribben's informative post.

Those two documents aren't linked from Intel's Galileo site under any of its submenus (particularly not in the documents section which lists the Quark SoC Datasheet which would have been the sensible place for them), nor in a very large number of other Intel, Galileo, Arduino and embedded industry sites that describe the board.  This is why Intel's numerous references to microcontroller and to wearables and IoT suggested very strongly that this was a cut-down device with a Pentium inner core but excluding all memory management, and hence was a microcontroller with the x86 instruction set.  That would appeal to many people after all.  The fact that the Quark SoC Datasheet even described a memory region protection feature quite similar to that in Cortex-M3 microcontrollers reinforced that belief.  Not even the Galileo FAQ suggested otherwise --- indeed, it didn't even mention known Linux distros that could be run on the board, which made it possible that uClinux was the only option owing to lack of MMU.  Nothing at all explicitly pointed to an MMU being present.

Armed with your knowledge of the Developer's Manual and Hardware Reference Manual, it's easy to see that this isn't so, but it didn't look that way without that information.  Hindsight is great.

Seems to be very much like those cust down 486 style SOCs that you used to see in routers not  unlike the Nat Semi/AMD Geode.

So really that cpu isn't too fantastic one way or another ...Much better than an AVR thing though

Seems to be very much like those cust down 486 style SOCs that you used to see in routers not  unlike the Nat Semi/AMD Geode.

So really that cpu isn't too fantastic one way or another ...Much better than an AVR thing though